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authorWayne Lin <Wayne.Lin@amd.com>2021-01-29 14:06:16 +0800
committerAlex Deucher <alexander.deucher@amd.com>2021-02-09 15:28:55 -0500
commit11f1a5538ba5f1c4462c806560a343b5258f22b8 (patch)
treeda940e43d2758d4c642559b1880421c91a3b9c03 /drivers/gpu/drm/amd/display
parentbe8901c2ee3a16f8a28c0c165c2766643a84acb8 (diff)
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drm/amdgpu: Add otg vertical IRQ Source
[Why & How] In order to get appropriate timing for registers which read/write is vertical line sensitive, add new IRQ source variable. This interrupt is triggered by specific vertical line, Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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