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authorDave Airlie <airlied@redhat.com>2020-09-23 09:25:17 +1000
committerDave Airlie <airlied@redhat.com>2020-09-23 09:25:18 +1000
commitfc88fef916e8971eefeacc62241b7408b7e7939d (patch)
treec2647e7388a752ffc1f9d12b5aaf9a83a69b5ba0 /drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h
parentdb29dc7d3346328b3fc61057d224a242f9928289 (diff)
parent911d5bd5e7b8531b39301c2c27e5b90d7bd71b88 (diff)
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Merge tag 'amd-drm-next-5.10-2020-09-18' of git://people.freedesktop.org/~agd5f/linux into drm-next
amd-drm-next-5.10-2020-09-18: amdgpu: - Support for PCIe DPC recovery - Sienna Cichlid updates - Navy Flounder updates - RAS fixes - Refactor DC interrupt handling - Display fixes - Fix issues with OLED panels - Mclk fixes for navi1x - Watermark fixes for renoir and raven2 - Misc code cleanups - Misc bug fixes amdkfd: - Fix a memory leak - Fix a crach in GPU reset - Add process eviction counters radeon: - expose sclk via sysfs hwmon interface - Revert bad PLL fix scheduler: - Kernel doc fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200918204322.3931-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h')
-rw-r--r--drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h
index b427f73bd536..919be1842bd5 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h
@@ -807,5 +807,25 @@
#define UVD_CONTEXT_ID2__CONTEXT_ID2__SHIFT 0x0
#define UVD_CONTEXT_ID2__CONTEXT_ID2_MASK 0xFFFFFFFFL
+//UVD_FW_STATUS
+#define UVD_FW_STATUS__BUSY__SHIFT 0x0
+#define UVD_FW_STATUS__ACTIVE__SHIFT 0x1
+#define UVD_FW_STATUS__SEND_EFUSE_REQ__SHIFT 0x2
+#define UVD_FW_STATUS__DONE__SHIFT 0x8
+#define UVD_FW_STATUS__PASS__SHIFT 0x10
+#define UVD_FW_STATUS__FAIL__SHIFT 0x11
+#define UVD_FW_STATUS__INVALID_LEN__SHIFT 0x12
+#define UVD_FW_STATUS__INVALID_0_PADDING__SHIFT 0x13
+#define UVD_FW_STATUS__INVALID_NONCE__SHIFT 0x14
+#define UVD_FW_STATUS__BUSY_MASK 0x00000001L
+#define UVD_FW_STATUS__ACTIVE_MASK 0x00000002L
+#define UVD_FW_STATUS__SEND_EFUSE_REQ_MASK 0x00000004L
+#define UVD_FW_STATUS__DONE_MASK 0x00000100L
+#define UVD_FW_STATUS__PASS_MASK 0x00010000L
+#define UVD_FW_STATUS__FAIL_MASK 0x00020000L
+#define UVD_FW_STATUS__INVALID_LEN_MASK 0x00040000L
+#define UVD_FW_STATUS__INVALID_0_PADDING_MASK 0x00080000L
+#define UVD_FW_STATUS__INVALID_NONCE_MASK 0x00100000L
+
#endif