diff options
| author | Zhi Wang <zhi.wang.linux@gmail.com> | 2017-09-24 21:53:03 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2017-11-16 11:48:21 +0800 |
| commit | f52c380a48f527930c86ea6fd7242873c93ba682 (patch) | |
| tree | 92f5756c03557a7c1212ab2f8e686dde0692cc5a /drivers/gpu/drm/i915/gvt/scheduler.h | |
| parent | 58facf8c46160706ccb3b7b3768c0f0e29407548 (diff) | |
| download | linux-stable-f52c380a48f527930c86ea6fd7242873c93ba682.tar.gz linux-stable-f52c380a48f527930c86ea6fd7242873c93ba682.tar.bz2 linux-stable-f52c380a48f527930c86ea6fd7242873c93ba682.zip | |
drm/i915/gvt: Refine shadow batch buffer
1) Use standard i915 GEM object sequence to access the shadow batch buffer.
2) Manage i915 vma life cycle to solve one FIXME.
v2:
- Refine code structure.
- Refine the usage of GEM APIs.
- Add the missing lock/unlock in release_shadow_batch_buffer.
Test on my SKL NuC.
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/scheduler.h')
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/scheduler.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.h b/drivers/gpu/drm/i915/gvt/scheduler.h index e0b5730a3018..e4a9f9acd4a9 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.h +++ b/drivers/gpu/drm/i915/gvt/scheduler.h @@ -112,13 +112,14 @@ struct intel_vgpu_workload { struct intel_shadow_wa_ctx wa_ctx; }; -/* Intel shadow batch buffer is a i915 gem object */ -struct intel_shadow_bb_entry { +struct intel_vgpu_shadow_bb { struct list_head list; struct drm_i915_gem_object *obj; + struct i915_vma *vma; void *va; - unsigned long len; u32 *bb_start_cmd_va; + unsigned int clflush; + bool accessing; }; #define workload_q_head(vgpu, ring_id) \ |