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author | Jakub Bartmiński <jakub.bartminski@intel.com> | 2018-07-27 16:11:46 +0200 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-07-27 16:07:37 +0100 |
commit | 496bcce3c9bf50ccf74b3050669600631cbf8138 (patch) | |
tree | f342f97fda41dffae610fd0f844dbcff0021ce6a /drivers/gpu/drm/i915/i915_gem_context.h | |
parent | dd18cedfa36fbbc19903aed12d6d94c06f5e6dea (diff) | |
download | linux-stable-496bcce3c9bf50ccf74b3050669600631cbf8138.tar.gz linux-stable-496bcce3c9bf50ccf74b3050669600631cbf8138.tar.bz2 linux-stable-496bcce3c9bf50ccf74b3050669600631cbf8138.zip |
drm/i915: Remove unnecessary ggtt_offset_bias from i915_gem_context
Since ggtt_offset_bias is now stored in ggtt.pin_bias, it is duplicated
inside i915_gem_context, and can instead be accessed directly from ggtt.
v3:
Added a helper function to retrieve the ggtt.pin_bias from the vma.
v4:
Moved the helper function to the previous patch in the series.
Dropped the bias from intel_ring_pin. This introduces a slight functional
change since we are always pinning the ring a bit higher if GuC is present
even though we don't really need to.
v8:
Fixed patch not applying on the most recent upstream.
Signed-off-by: Jakub Bartmiński <jakub.bartminski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180727141148.30874-4-jakub.bartminski@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_context.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_context.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_context.h b/drivers/gpu/drm/i915/i915_gem_context.h index b116e4942c10..851dad6decd7 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.h +++ b/drivers/gpu/drm/i915/i915_gem_context.h @@ -147,9 +147,6 @@ struct i915_gem_context { struct i915_sched_attr sched; - /** ggtt_offset_bias: placement restriction for context objects */ - u32 ggtt_offset_bias; - /** engine: per-engine logical HW state */ struct intel_context { struct i915_gem_context *gem_context; |