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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-01-23 21:04:26 +0200 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-01-27 09:51:17 +0100 |
commit | 7c59a9c133868b0c028a04562a1c2b2dbbad5284 (patch) | |
tree | 7ceeaa6c7cd4cf234a6babf01d7a9ddcea0b6bcb /drivers/gpu/drm/i915/i915_sysfs.c | |
parent | 616bc8202da4a8f7e5382f28a03271772bad658a (diff) | |
download | linux-stable-7c59a9c133868b0c028a04562a1c2b2dbbad5284.tar.gz linux-stable-7c59a9c133868b0c028a04562a1c2b2dbbad5284.tar.bz2 linux-stable-7c59a9c133868b0c028a04562a1c2b2dbbad5284.zip |
drm/i915: Use intel_gpu_freq() and intel_freq_opcode()
Replace all the vlv_gpu_freq(), vlv_freq_opcode(),
*GT_FREQUENCY_MULTIPLIER, and /GT_FREQUENCY_MULTIPLIER instances
with intel_gpu_freq() and intel_freq_opcode() calls.
Most of the change was performed with the following semantic patch:
@@
expression E;
@@
(
- E * GT_FREQUENCY_MULTIPLIER
+ intel_gpu_freq(dev_priv, E)
|
- E *= GT_FREQUENCY_MULTIPLIER
+ E = intel_gpu_freq(dev_priv, E)
|
- E /= GT_FREQUENCY_MULTIPLIER
+ E = intel_freq_opcode(dev_priv, E)
|
- do_div(E, GT_FREQUENCY_MULTIPLIER)
+ E = intel_freq_opcode(dev_priv, E)
)
@@
expression E1, E2;
@@
(
- vlv_gpu_freq(E1, E2)
+ intel_gpu_freq(E1, E2)
|
- vlv_freq_opcode(E1, E2)
+ intel_freq_opcode(E1, E2)
)
@@
expression E1, E2, E3, E4;
@@
(
- if (IS_VALLEYVIEW(E1)) {
- E2 = intel_gpu_freq(E3, E4);
- } else {
- E2 = intel_gpu_freq(E3, E4);
- }
+ E2 = intel_gpu_freq(E3, E4);
|
- if (IS_VALLEYVIEW(E1)) {
- E2 = intel_freq_opcode(E3, E4);
- } else {
- E2 = intel_freq_opcode(E3, E4);
- }
+ E2 = intel_freq_opcode(E3, E4);
)
One hunk was manually undone as intel_gpu_freq() ended up
calling itself. Supposedly it would be possible to exclude
certain functions via !=~, but I couldn't get that to work.
Also the removal of vlv_gpu_freq() and vlv_opcode_freq() compat
wrappers was done manually.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_sysfs.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_sysfs.c | 52 |
1 files changed, 20 insertions, 32 deletions
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 532ad3477997..49f5ade0edb7 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -297,14 +297,14 @@ static ssize_t gt_act_freq_mhz_show(struct device *kdev, if (IS_VALLEYVIEW(dev_priv->dev)) { u32 freq; freq = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS); - ret = vlv_gpu_freq(dev_priv, (freq >> 8) & 0xff); + ret = intel_gpu_freq(dev_priv, (freq >> 8) & 0xff); } else { u32 rpstat = I915_READ(GEN6_RPSTAT1); if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) ret = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT; else ret = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT; - ret *= GT_FREQUENCY_MULTIPLIER; + ret = intel_gpu_freq(dev_priv, ret); } mutex_unlock(&dev_priv->rps.hw_lock); @@ -326,11 +326,7 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev, intel_runtime_pm_get(dev_priv); mutex_lock(&dev_priv->rps.hw_lock); - if (IS_VALLEYVIEW(dev_priv->dev)) { - ret = vlv_gpu_freq(dev_priv, dev_priv->rps.cur_freq); - } else { - ret = dev_priv->rps.cur_freq * GT_FREQUENCY_MULTIPLIER; - } + ret = intel_gpu_freq(dev_priv, dev_priv->rps.cur_freq); mutex_unlock(&dev_priv->rps.hw_lock); intel_runtime_pm_put(dev_priv); @@ -345,8 +341,9 @@ static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev, struct drm_device *dev = minor->dev; struct drm_i915_private *dev_priv = dev->dev_private; - return snprintf(buf, PAGE_SIZE, "%d\n", - vlv_gpu_freq(dev_priv, dev_priv->rps.efficient_freq)); + return snprintf(buf, PAGE_SIZE, + "%d\n", + intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq)); } static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) @@ -359,10 +356,7 @@ static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute flush_delayed_work(&dev_priv->rps.delayed_resume_work); mutex_lock(&dev_priv->rps.hw_lock); - if (IS_VALLEYVIEW(dev_priv->dev)) - ret = vlv_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit); - else - ret = dev_priv->rps.max_freq_softlimit * GT_FREQUENCY_MULTIPLIER; + ret = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit); mutex_unlock(&dev_priv->rps.hw_lock); return snprintf(buf, PAGE_SIZE, "%d\n", ret); @@ -386,10 +380,7 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, mutex_lock(&dev_priv->rps.hw_lock); - if (IS_VALLEYVIEW(dev_priv->dev)) - val = vlv_freq_opcode(dev_priv, val); - else - val /= GT_FREQUENCY_MULTIPLIER; + val = intel_freq_opcode(dev_priv, val); if (val < dev_priv->rps.min_freq || val > dev_priv->rps.max_freq || @@ -400,7 +391,7 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, if (val > dev_priv->rps.rp0_freq) DRM_DEBUG("User requested overclocking to %d\n", - val * GT_FREQUENCY_MULTIPLIER); + intel_gpu_freq(dev_priv, val)); dev_priv->rps.max_freq_softlimit = val; @@ -431,10 +422,7 @@ static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute flush_delayed_work(&dev_priv->rps.delayed_resume_work); mutex_lock(&dev_priv->rps.hw_lock); - if (IS_VALLEYVIEW(dev_priv->dev)) - ret = vlv_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit); - else - ret = dev_priv->rps.min_freq_softlimit * GT_FREQUENCY_MULTIPLIER; + ret = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit); mutex_unlock(&dev_priv->rps.hw_lock); return snprintf(buf, PAGE_SIZE, "%d\n", ret); @@ -458,10 +446,7 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, mutex_lock(&dev_priv->rps.hw_lock); - if (IS_VALLEYVIEW(dev)) - val = vlv_freq_opcode(dev_priv, val); - else - val /= GT_FREQUENCY_MULTIPLIER; + val = intel_freq_opcode(dev_priv, val); if (val < dev_priv->rps.min_freq || val > dev_priv->rps.max_freq || @@ -521,19 +506,22 @@ static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr if (attr == &dev_attr_gt_RP0_freq_mhz) { if (IS_VALLEYVIEW(dev)) - val = vlv_gpu_freq(dev_priv, dev_priv->rps.rp0_freq); + val = intel_gpu_freq(dev_priv, dev_priv->rps.rp0_freq); else - val = ((rp_state_cap & 0x0000ff) >> 0) * GT_FREQUENCY_MULTIPLIER; + val = intel_gpu_freq(dev_priv, + ((rp_state_cap & 0x0000ff) >> 0)); } else if (attr == &dev_attr_gt_RP1_freq_mhz) { if (IS_VALLEYVIEW(dev)) - val = vlv_gpu_freq(dev_priv, dev_priv->rps.rp1_freq); + val = intel_gpu_freq(dev_priv, dev_priv->rps.rp1_freq); else - val = ((rp_state_cap & 0x00ff00) >> 8) * GT_FREQUENCY_MULTIPLIER; + val = intel_gpu_freq(dev_priv, + ((rp_state_cap & 0x00ff00) >> 8)); } else if (attr == &dev_attr_gt_RPn_freq_mhz) { if (IS_VALLEYVIEW(dev)) - val = vlv_gpu_freq(dev_priv, dev_priv->rps.min_freq); + val = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq); else - val = ((rp_state_cap & 0xff0000) >> 16) * GT_FREQUENCY_MULTIPLIER; + val = intel_gpu_freq(dev_priv, + ((rp_state_cap & 0xff0000) >> 16)); } else { BUG(); } |