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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-05 23:40:59 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-06 08:53:31 +0000 |
| commit | d315fe8bde5cd052ab1e839d1f6c09919297c7a8 (patch) | |
| tree | 8b1be57a3c051e651ee0afef639d379d8f709d64 /drivers/gpu/drm/i915/i915_vma.c | |
| parent | bbca083de291a03ffe1a1eb0832a0d74f8b64898 (diff) | |
| download | linux-stable-d315fe8bde5cd052ab1e839d1f6c09919297c7a8.tar.gz linux-stable-d315fe8bde5cd052ab1e839d1f6c09919297c7a8.tar.bz2 linux-stable-d315fe8bde5cd052ab1e839d1f6c09919297c7a8.zip | |
drm/i915/gt: Trim gen6 ppgtt updates to PD cachelines
It appears now that we have the ring TLB invalidation in place, we need
only update the page directory cachelines that we have altered. A great
reduction from rewriting the whole 2MiB ppgtt on every update.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191205234059.1010030-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_vma.c')
0 files changed, 0 insertions, 0 deletions