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author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2018-02-28 12:11:52 +0200 |
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committer | Mika Kuoppala <mika.kuoppala@linux.intel.com> | 2018-03-01 14:13:47 +0200 |
commit | 022d3093a9102a8b8b7a3796a8aba5a9c4e40ec7 (patch) | |
tree | ced093f2fd0ffbcf54775e2d66d50c1296b6eb29 /drivers/gpu/drm/i915/intel_device_info.h | |
parent | bba73071b6f71be0a101658d7c13866e30b264a6 (diff) | |
download | linux-stable-022d3093a9102a8b8b7a3796a8aba5a9c4e40ec7.tar.gz linux-stable-022d3093a9102a8b8b7a3796a8aba5a9c4e40ec7.tar.bz2 linux-stable-022d3093a9102a8b8b7a3796a8aba5a9c4e40ec7.zip |
drm/i915/icl: Prepare for more rings
Gen11 will add more VCS and VECS rings so prepare the
infrastructure to support that.
Bspec: 7021
v2: Rebase.
v3: Rebase.
v4: Rebase.
v5: Rebase.
v6:
- Update for POR changes. (Daniele Ceraolo Spurio)
- Add provisional guc engine ids - to be checked and confirmed.
v7:
- Rebased.
- Added the new ring masks.
- Added the new HW ids.
v8:
- Introduce I915_MAX_VCS/VECS to avoid magic numbers (Michal)
v9: increase MAX_ENGINE_INSTANCE to 3
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180228101153.7224-1-mika.kuoppala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_device_info.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_device_info.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 8904ad87bf37..ab5bfd305477 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -125,6 +125,8 @@ struct sseu_dev_info { u8 has_eu_pg:1; }; +typedef u8 intel_ring_mask_t; + struct intel_device_info { u16 device_id; u16 gen_mask; @@ -132,7 +134,7 @@ struct intel_device_info { u8 gen; u8 gt; /* GT number, 0 if undefined */ u8 num_rings; - u8 ring_mask; /* Rings supported by the HW */ + intel_ring_mask_t ring_mask; /* Rings supported by the HW */ enum intel_platform platform; u32 platform_mask; |