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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-04-12 21:30:09 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-04-30 22:14:43 +0300 |
| commit | 09b25812db10fcbd7937c1b7ca279c5c0d77ba9d (patch) | |
| tree | 98ec25ffe9c765c844753a9dec4956a9d1604f56 /drivers/gpu/drm/i915/intel_display.c | |
| parent | 9b11215e40c5a0aefba9b026543fb0799f61bf6f (diff) | |
| download | linux-stable-09b25812db10fcbd7937c1b7ca279c5c0d77ba9d.tar.gz linux-stable-09b25812db10fcbd7937c1b7ca279c5c0d77ba9d.tar.bz2 linux-stable-09b25812db10fcbd7937c1b7ca279c5c0d77ba9d.zip | |
drm/i915: Enable pipe HDR mode on ICL if only HDR planes are used
The pipe has a special HDR mode with higher precision when only
HDR planes are active. Let's use it.
Curiously this fixes the kms_color gamma/degamma tests when
using a HDR plane, which is always the case unless one hacks
the test to use an SDR plane. If one does hack the test to use
an SDR plane it does pass already.
I have no actual explanation how the output after the gamma
LUT can be different between the two modes. The way the tests
are written should mean that the output should be identical
between the solid color vs. the gradient. But clearly that
somehow doesn't hold true for the HDR planes in non-HDR pipe
mode. Anyways, as long as we stick to one type of plane the
test should produce sensible results now.
v2: s/HDR_MODE/HDR_MODE_PRECISION/ (Shashank)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190412183009.8237-2-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Tested-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 42973456afd4..1762a1891f1b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4099,6 +4099,9 @@ static void intel_update_pipe_config(const struct intel_crtc_state *old_crtc_sta ironlake_pfit_disable(old_crtc_state); } + if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv)) + bdw_set_pipemisc(new_crtc_state); + if (INTEL_GEN(dev_priv) >= 11) icl_set_pipe_chicken(crtc); } @@ -8926,6 +8929,10 @@ static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state) val |= PIPEMISC_YUV420_ENABLE | PIPEMISC_YUV420_MODE_FULL_BLEND; + if (INTEL_GEN(dev_priv) >= 11 && + (crtc_state->active_planes & ~icl_hdr_plane_mask()) == 0) + val |= PIPEMISC_HDR_MODE_PRECISION; + I915_WRITE(PIPEMISC(crtc->pipe), val); } |