diff options
author | Imre Deak <imre.deak@intel.com> | 2019-03-20 15:54:37 +0200 |
---|---|---|
committer | Imre Deak <imre.deak@intel.com> | 2019-04-03 18:58:10 +0300 |
commit | 48d9f87ddd2108663fd866b254e05d422243cc56 (patch) | |
tree | fd1d9bc5a3bd9a1da3b9efe5cbfafa891d256926 /drivers/gpu/drm/i915/intel_display.c | |
parent | 905801fe72377b4dc53c6e13eea1a91c6a4aa0c4 (diff) | |
download | linux-stable-48d9f87ddd2108663fd866b254e05d422243cc56.tar.gz linux-stable-48d9f87ddd2108663fd866b254e05d422243cc56.tar.bz2 linux-stable-48d9f87ddd2108663fd866b254e05d422243cc56.zip |
drm/i915: Save the old CDCLK atomic state
The old state will be needed by an upcoming patch to determine if the
commit increases or decreases CDCLK, so move the old state to the atomic
state (while keeping the new one in dev_priv). cdclk.logical and
cdclk.actual in the atomic state isn't used atm anywhere after the
atomic check phase, so this should be safe.
v2:
- Use swap() instead of opencoding it. (Ville)
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190320135439.12201-2-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index cc090ab4936a..702d28459bee 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -13683,10 +13683,10 @@ static int intel_atomic_commit(struct drm_device *dev, intel_state->min_voltage_level, sizeof(intel_state->min_voltage_level)); dev_priv->active_crtcs = intel_state->active_crtcs; - dev_priv->cdclk.logical = intel_state->cdclk.logical; - dev_priv->cdclk.actual = intel_state->cdclk.actual; dev_priv->cdclk.force_min_cdclk = intel_state->cdclk.force_min_cdclk; + + intel_cdclk_swap_state(intel_state); } drm_atomic_state_get(state); |