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author | Chris Wilson <chris@chris-wilson.co.uk> | 2018-04-30 14:15:01 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-04-30 16:01:13 +0100 |
commit | ab82a0635cdf0b91a134aaae34abd4e864595c5b (patch) | |
tree | c5efbac1f010e49c5d2a19f2d29be6be23dd7325 /drivers/gpu/drm/i915/intel_guc_submission.c | |
parent | 52d7f16e5543ca892ae2393a716083d209ce3b36 (diff) | |
download | linux-stable-ab82a0635cdf0b91a134aaae34abd4e864595c5b.tar.gz linux-stable-ab82a0635cdf0b91a134aaae34abd4e864595c5b.tar.bz2 linux-stable-ab82a0635cdf0b91a134aaae34abd4e864595c5b.zip |
drm/i915: Wrap engine->context_pin() and engine->context_unpin()
Make life easier in upcoming patches by moving the context_pin and
context_unpin vfuncs into inline helpers.
v2: Fixup mock_engine to mark the context as pinned on use.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180430131503.5375-2-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc_submission.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_guc_submission.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c index 02da05875aa7..6e6ed0f46bd3 100644 --- a/drivers/gpu/drm/i915/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/intel_guc_submission.c @@ -362,7 +362,7 @@ static void guc_stage_desc_init(struct intel_guc *guc, desc->db_id = client->doorbell_id; for_each_engine_masked(engine, dev_priv, client->engines, tmp) { - struct intel_context *ce = &ctx->engine[engine->id]; + struct intel_context *ce = to_intel_context(ctx, engine); u32 guc_engine_id = engine->guc_id; struct guc_execlist_context *lrc = &desc->lrc[guc_engine_id]; @@ -990,7 +990,8 @@ static void guc_fill_preempt_context(struct intel_guc *guc) enum intel_engine_id id; for_each_engine(engine, dev_priv, id) { - struct intel_context *ce = &client->owner->engine[id]; + struct intel_context *ce = + to_intel_context(client->owner, engine); u32 addr = intel_hws_preempt_done_address(engine); u32 *cs; |