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author | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2019-11-05 14:53:21 -0800 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-11-14 23:04:36 +0000 |
commit | 1cdc2330e8d396c9cbebfc75fba4c94d34f80782 (patch) | |
tree | b0429c4516eb54e8a43140420d5db3726078051b /drivers/gpu/drm/i915/intel_pm.c | |
parent | 980f87a2edb3e7825949ebd0a7e63ab574c20816 (diff) | |
download | linux-stable-1cdc2330e8d396c9cbebfc75fba4c94d34f80782.tar.gz linux-stable-1cdc2330e8d396c9cbebfc75fba4c94d34f80782.tar.bz2 linux-stable-1cdc2330e8d396c9cbebfc75fba4c94d34f80782.zip |
drm/i915/guc: Properly capture & release GuC interrupts on Gen11+
With the new interrupt re-partitioning in Gen11, GuC controls by itself
the interrupts it receives, so steering bits and registers have been
defeatured. Being this the case, when the GuC is in control of
submissions we won't know what to do with the ctx switch interrupt
in the driver, so disable it.
v2 (Daniele): replace the gen9 paths instead of keeping gen9 and gen11
functions since we won't support guc submission on any pre-gen11 platform.
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191105225321.26642-1-daniele.ceraolospurio@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
0 files changed, 0 insertions, 0 deletions