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author | Chris Wilson <chris@chris-wilson.co.uk> | 2016-06-30 15:33:40 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2016-06-30 15:42:32 +0100 |
commit | 41e8a1e8647a325ce801fbfa9f0f186a4c970a2d (patch) | |
tree | 15b8c4f96d6fdf650886e96a3b42b5fa15aa2233 /drivers/gpu/drm/i915/intel_sideband.c | |
parent | 564514fdde045edb141f2293b0accec673ad1871 (diff) | |
download | linux-stable-41e8a1e8647a325ce801fbfa9f0f186a4c970a2d.tar.gz linux-stable-41e8a1e8647a325ce801fbfa9f0f186a4c970a2d.tar.bz2 linux-stable-41e8a1e8647a325ce801fbfa9f0f186a4c970a2d.zip |
drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):
text data bss dec hex filename
1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko
1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1467297225-21379-57-git-send-email-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sideband.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_sideband.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c index 7dea3c382892..6841e2315b1b 100644 --- a/drivers/gpu/drm/i915/intel_sideband.c +++ b/drivers/gpu/drm/i915/intel_sideband.c @@ -221,8 +221,11 @@ u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg, value = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IORD; I915_WRITE(SBI_CTL_STAT, value | SBI_BUSY); - if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_BUSY | SBI_RESPONSE_FAIL)) == 0, - 100)) { + if (intel_wait_for_register(dev_priv, + SBI_CTL_STAT, + SBI_BUSY | SBI_RESPONSE_FAIL, + 0, + 100)) { DRM_ERROR("timeout waiting for SBI to complete read transaction\n"); return 0; } |