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author | Matt Roper <matthew.d.roper@intel.com> | 2022-05-27 09:33:47 -0700 |
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committer | Matt Roper <matthew.d.roper@intel.com> | 2022-05-31 14:44:57 -0700 |
commit | 8b449f1c44d1f921240da6a3e7fc4030966abbff (patch) | |
tree | 6d5716dc5f6d500062f42ff2dae3120b67afed9a /drivers/gpu/drm/i915/intel_step.h | |
parent | 420a07b841d03f6a436d8c06571c69aa5c783897 (diff) | |
download | linux-stable-8b449f1c44d1f921240da6a3e7fc4030966abbff.tar.gz linux-stable-8b449f1c44d1f921240da6a3e7fc4030966abbff.tar.bz2 linux-stable-8b449f1c44d1f921240da6a3e7fc4030966abbff.zip |
drm/i915/pvc: Extract stepping information from PCI revid
For PVC, the base die and compute tile have separate stepping values
that we need to track; we'll use the existing graphics_step field to
represent the compute tile stepping and add a new 'basedie_step' field.
Unlike past platforms, steppings for these components are represented by
specific bitfields within the PCI revision ID, and we shouldn't make
assumptions about the non-CT, non-BD bits staying 0. Let's update our
stepping code accordingly.
Bspec: 44484
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220527163348.1936146-2-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_step.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_step.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h index d71a99bd5179..a6b12bfa9744 100644 --- a/drivers/gpu/drm/i915/intel_step.h +++ b/drivers/gpu/drm/i915/intel_step.h @@ -11,9 +11,10 @@ struct drm_i915_private; struct intel_step_info { - u8 graphics_step; + u8 graphics_step; /* Represents the compute tile on Xe_HPC */ u8 display_step; u8 media_step; + u8 basedie_step; }; #define STEP_ENUM_VAL(name) STEP_##name, @@ -25,6 +26,7 @@ struct intel_step_info { func(B0) \ func(B1) \ func(B2) \ + func(B3) \ func(C0) \ func(C1) \ func(D0) \ |