diff options
| author | Stu Hsieh <stu.hsieh@mediatek.com> | 2018-08-09 10:15:47 +0800 |
|---|---|---|
| committer | CK Hu <ck.hu@mediatek.com> | 2018-08-27 11:24:37 +0800 |
| commit | 66b2cf9623facfad790b335fcfd717258a00896b (patch) | |
| tree | 100ed95d5e137c767b1c00bc735d66ff595eda4e /drivers/gpu/drm/mediatek/mtk_drm_crtc.h | |
| parent | 98b6d76f957ba80017a3118fe0e33030b4bc017b (diff) | |
| download | linux-stable-66b2cf9623facfad790b335fcfd717258a00896b.tar.gz linux-stable-66b2cf9623facfad790b335fcfd717258a00896b.tar.bz2 linux-stable-66b2cf9623facfad790b335fcfd717258a00896b.zip | |
drm/mediatek: use layer_nr function to get layer number to init plane
This patch use layer_nr function to get layer number to init plane
When plane init in crtc create,
it use the number of OVL layer to init plane.
That's OVL can read 4 memory address.
For mt2712 third ddp, it use RDMA to read memory.
RDMA can read 1 memory address, so it just init one plane.
For compatibility, this patch use mtk_ddp_comp_layer_nr function
to get layer number from their HW component in ddp for plane init.
Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'drivers/gpu/drm/mediatek/mtk_drm_crtc.h')
| -rw-r--r-- | drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h index 9d9410c67ae9..60bcc8aba8e3 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h @@ -18,7 +18,6 @@ #include "mtk_drm_ddp_comp.h" #include "mtk_drm_plane.h" -#define OVL_LAYER_NR 4 #define MTK_LUT_SIZE 512 #define MTK_MAX_BPC 10 #define MTK_MIN_BPC 3 |