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authorBibby Hsieh <bibby.hsieh@mediatek.com>2016-09-29 11:29:49 +0800
committerCK Hu <ck.hu@mediatek.com>2016-10-19 09:06:12 +0800
commit56e4b1e183555c74097fa012f1606b22223f027b (patch)
tree680f968f614f327ea6e07ca07d19d7d5fba1a546 /drivers/gpu/drm/mediatek
parentf752fff611b99f5679224f3990a1f531ea64b1ec (diff)
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drm/mediatek: clear IRQ status before enable OVL interrupt
To make sure that the first vblank IRQ after enabling vblank isn't too short or immediate, we have to clear the IRQ status before enable OVL interrupt. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Acked-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'drivers/gpu/drm/mediatek')
-rw-r--r--drivers/gpu/drm/mediatek/mtk_disp_ovl.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index 019b7ca392d7..f75c5b5a536c 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -80,6 +80,7 @@ static void mtk_ovl_enable_vblank(struct mtk_ddp_comp *comp,
ddp_comp);
priv->crtc = crtc;
+ writel(0x0, comp->regs + DISP_REG_OVL_INTSTA);
writel_relaxed(OVL_FME_CPL_INT, comp->regs + DISP_REG_OVL_INTEN);
}