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author | Dave Airlie <airlied@redhat.com> | 2013-12-23 10:46:07 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2013-12-23 10:46:07 +1000 |
commit | 859ae233cd0ee76b6143f948ba1cb6b0b4c342f8 (patch) | |
tree | b2071654cf0ef520e047035720a101d3222e47bc /drivers/gpu/drm/msm/Kconfig | |
parent | 785e15ecefbfe8ea311ae320fdacd482a84b3cc3 (diff) | |
parent | ab57fff1302c485d74992d34df24ccb5efda244e (diff) | |
download | linux-stable-859ae233cd0ee76b6143f948ba1cb6b0b4c342f8.tar.gz linux-stable-859ae233cd0ee76b6143f948ba1cb6b0b4c342f8.tar.bz2 linux-stable-859ae233cd0ee76b6143f948ba1cb6b0b4c342f8.zip |
Merge tag 'drm-intel-next-2013-12-13' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
- fbc1 improvements from Ville (pre-gm45).
- vlv forcewake improvements from Deepak S.
- Some corner-cases fixes from Mika for the context hang stat code.
- pc8 improvements and prep work for runtime D3 from Paulo, almost ready for
primetime.
- gen2 dpll fixes from Ville.
- DSI improvements from Shobhit Kumar.
- A few smaller fixes and improvements all over.
[airlied: intel_ddi.c conflict fixed up]
* tag 'drm-intel-next-2013-12-13' of git://people.freedesktop.org/~danvet/drm-intel: (61 commits)
drm/i915/bdw: Implement ff workarounds
drm/i915/bdw: Force all Data Cache Data Port access to be Non-Coherent
drm/i915/bdw: Don't use forcewake needlessly
drm/i915: Clear out old GT FIFO errors in intel_uncore_early_sanitize()
drm/i915: dont call irq_put when irq test is on
drm/i915: Rework the FBC interval/stall stuff a bit
drm/i915: Enable FBC for all mobile gen2 and gen3 platforms
drm/i915: FBC_CONTROL2 is gen4 only
drm/i915: Gen2 FBC1 CFB pitch wants 32B units
drm/i915: split intel_ddi_pll_mode_set in 2 pieces
drm/i915: Fix timeout with missed interrupts in __wait_seqno
drm/i915: touch VGA MSR after we enable the power well
drm/i915: extract hsw_power_well_post_{enable, disable}
drm/i915: remove i915_disable_vga_mem declaration
drm/i915: Parametrize the dphy and other spec specific parameters
drm/i915: Remove redundant DSI PLL enabling
drm/i915: Reorganize the DSI enable/disable sequence
drm/i915: Try harder to get best m, n, p values with minimal error
drm/i915: Compute dsi_clk from pixel clock
drm/i915: Use FLISDSI interface for band gap reset
...
Conflicts:
drivers/gpu/drm/i915/intel_ddi.c
Diffstat (limited to 'drivers/gpu/drm/msm/Kconfig')
0 files changed, 0 insertions, 0 deletions