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| author | Kuogee Hsieh <quic_khsieh@quicinc.com> | 2024-02-22 11:39:59 -0800 |
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-03-04 11:38:50 +0200 |
| commit | 64f7b81f035801cd948a00c4988165b768b8087d (patch) | |
| tree | 00f49bf7c3715209fc504fb1b2ff8d29cac60343 /drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | |
| parent | 55fb8ffc18024138f956f8579fb800961a015385 (diff) | |
| download | linux-stable-64f7b81f035801cd948a00c4988165b768b8087d.tar.gz linux-stable-64f7b81f035801cd948a00c4988165b768b8087d.tar.bz2 linux-stable-64f7b81f035801cd948a00c4988165b768b8087d.zip | |
drm/msm/dpu: add support of new peripheral flush mechanism
Introduce a peripheral flushing mechanism to decouple peripheral
metadata flushing from timing engine related flush.
Changes in v2:
- Fixed some misalignment issues
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/579619/
Link: https://lore.kernel.org/r/20240222194025.25329-15-quic_parellan@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Diffstat (limited to 'drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h')
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h index ff85b5ee0acf..ef56280bea93 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h @@ -123,6 +123,15 @@ struct dpu_hw_ctl_ops { enum dpu_intf blk); /** + * OR in the given flushbits to the cached pending_(periph_)flush_mask + * No effect on hardware + * @ctx : ctl path ctx pointer + * @blk : interface block index + */ + void (*update_pending_flush_periph)(struct dpu_hw_ctl *ctx, + enum dpu_intf blk); + + /** * OR in the given flushbits to the cached pending_(merge_3d_)flush_mask * No effect on hardware * @ctx : ctl path ctx pointer @@ -264,6 +273,7 @@ struct dpu_hw_ctl { u32 pending_flush_mask; u32 pending_intf_flush_mask; u32 pending_wb_flush_mask; + u32 pending_periph_flush_mask; u32 pending_merge_3d_flush_mask; u32 pending_dspp_flush_mask[DSPP_MAX - DSPP_0]; u32 pending_dsc_flush_mask; |