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| author | Rob Clark <robdclark@chromium.org> | 2021-07-27 18:06:14 -0700 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2021-07-28 09:19:00 -0700 |
| commit | 1d8a5ca436ee4a28eec14cb813f790f7cdeeee19 (patch) | |
| tree | 4e7ef645394d0de1d8fe506ed776e24fc7198611 /drivers/gpu/drm/msm/msm_gpu.h | |
| parent | 79341eb74c1fd193fe17b015c856e713e82650a2 (diff) | |
| download | linux-stable-1d8a5ca436ee4a28eec14cb813f790f7cdeeee19.tar.gz linux-stable-1d8a5ca436ee4a28eec14cb813f790f7cdeeee19.tar.bz2 linux-stable-1d8a5ca436ee4a28eec14cb813f790f7cdeeee19.zip | |
drm/msm: Conversion to drm scheduler
For existing adrenos, there is one or more ringbuffer, depending on
whether preemption is supported. When preemption is supported, each
ringbuffer has it's own priority. A submitqueue (which maps to a
gl context or vk queue in userspace) is mapped to a specific ring-
buffer at creation time, based on the submitqueue's priority.
Each ringbuffer has it's own drm_gpu_scheduler. Each submitqueue
maps to a drm_sched_entity. And each submit maps to a drm_sched_job.
Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/4
Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Christian König <christian.koenig@amd.com>
Link: https://lore.kernel.org/r/20210728010632.2633470-10-robdclark@gmail.com
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_gpu.h')
| -rw-r--r-- | drivers/gpu/drm/msm/msm_gpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 579627252540..b912cacaecc0 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -267,6 +267,7 @@ struct msm_gpu_perfcntr { * seqno, protected by submitqueue lock * @lock: submitqueue lock * @ref: reference count + * @entity: the submit job-queue */ struct msm_gpu_submitqueue { int id; @@ -278,6 +279,7 @@ struct msm_gpu_submitqueue { struct idr fence_idr; struct mutex lock; struct kref ref; + struct drm_sched_entity entity; }; struct msm_gpu_state_bo { |