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| author | Mark yao <mark.yao@rock-chips.com> | 2017-07-26 14:19:19 +0800 |
|---|---|---|
| committer | Mark Yao <mark.yao@rock-chips.com> | 2017-07-31 08:44:00 +0800 |
| commit | ac6560dfc8ab5dd57220ed21653d84481e13a6d2 (patch) | |
| tree | 26426a77147c66266b6225f3d0c39d2b8ceeea45 /drivers/gpu/drm/rockchip/rockchip_vop_reg.c | |
| parent | 9548e1b49a0cb2eb0cec1cf2560c920fe2954608 (diff) | |
| download | linux-stable-ac6560dfc8ab5dd57220ed21653d84481e13a6d2.tar.gz linux-stable-ac6560dfc8ab5dd57220ed21653d84481e13a6d2.tar.bz2 linux-stable-ac6560dfc8ab5dd57220ed21653d84481e13a6d2.zip | |
drm/rockchip: vop: move line_flag_num to interrupt registers
In the hardware design process, the design of line flags
register is associated with the interrupt register,
placing the line flags in the interrupt definition is
more reasonable, and it would make multi-vop define easilier.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/1501049960-6006-1-git-send-email-mark.yao@rock-chips.com
Diffstat (limited to 'drivers/gpu/drm/rockchip/rockchip_vop_reg.c')
| -rw-r--r-- | drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index d7974da29f61..0a5f0d2b43d1 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -116,6 +116,7 @@ static const int rk3036_vop_intrs[] = { static const struct vop_intr rk3036_intr = { .intrs = rk3036_vop_intrs, .nintrs = ARRAY_SIZE(rk3036_vop_intrs), + .line_flag_num[0] = VOP_REG(RK3036_INT_STATUS, 0xfff, 12), .status = VOP_REG(RK3036_INT_STATUS, 0xf, 0), .enable = VOP_REG(RK3036_INT_STATUS, 0xf, 4), .clear = VOP_REG(RK3036_INT_STATUS, 0xf, 8), @@ -130,7 +131,6 @@ static const struct vop_ctrl rk3036_ctrl_data = { .hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0), .vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0), .vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0), - .line_flag_num[0] = VOP_REG(RK3036_INT_STATUS, 0xfff, 12), .cfg_done = VOP_REG_SYNC(RK3036_REG_CFG_DONE, 0x1, 0), }; @@ -226,7 +226,6 @@ static const struct vop_ctrl rk3288_ctrl_data = { .vact_st_end = VOP_REG(RK3288_DSP_VACT_ST_END, 0x1fff1fff, 0), .hpost_st_end = VOP_REG(RK3288_POST_DSP_HACT_INFO, 0x1fff1fff, 0), .vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0), - .line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12), .global_regdone_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 11), .cfg_done = VOP_REG_SYNC(RK3288_REG_CFG_DONE, 0x1, 0), }; @@ -258,6 +257,7 @@ static const int rk3288_vop_intrs[] = { static const struct vop_intr rk3288_vop_intr = { .intrs = rk3288_vop_intrs, .nintrs = ARRAY_SIZE(rk3288_vop_intrs), + .line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12), .status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0), .enable = VOP_REG(RK3288_INTR_CTRL0, 0xf, 4), .clear = VOP_REG(RK3288_INTR_CTRL0, 0xf, 8), @@ -294,8 +294,6 @@ static const struct vop_ctrl rk3399_ctrl_data = { .vact_st_end = VOP_REG(RK3399_DSP_VACT_ST_END, 0x1fff1fff, 0), .hpost_st_end = VOP_REG(RK3399_POST_DSP_HACT_INFO, 0x1fff1fff, 0), .vpost_st_end = VOP_REG(RK3399_POST_DSP_VACT_INFO, 0x1fff1fff, 0), - .line_flag_num[0] = VOP_REG(RK3399_LINE_FLAG, 0xffff, 0), - .line_flag_num[1] = VOP_REG(RK3399_LINE_FLAG, 0xffff, 16), .cfg_done = VOP_REG_MASK_SYNC(RK3399_REG_CFG_DONE, 0x1, 0), }; @@ -312,6 +310,8 @@ static const int rk3399_vop_intrs[] = { static const struct vop_intr rk3399_vop_intr = { .intrs = rk3399_vop_intrs, .nintrs = ARRAY_SIZE(rk3399_vop_intrs), + .line_flag_num[0] = VOP_REG(RK3399_LINE_FLAG, 0xffff, 0), + .line_flag_num[1] = VOP_REG(RK3399_LINE_FLAG, 0xffff, 16), .status = VOP_REG_MASK_SYNC(RK3399_INTR_STATUS0, 0xffff, 0), .enable = VOP_REG_MASK_SYNC(RK3399_INTR_EN0, 0xffff, 0), .clear = VOP_REG_MASK_SYNC(RK3399_INTR_CLEAR0, 0xffff, 0), |