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author | Thierry Reding <treding@nvidia.com> | 2022-11-17 13:34:23 +0100 |
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committer | Thierry Reding <treding@nvidia.com> | 2023-01-27 17:49:44 +0100 |
commit | 2abdd44e3126e29cc310cbf5f1eda7ca7d979df3 (patch) | |
tree | eeb309e08411e5dee46978d1a0c8cef31342e06a /drivers/gpu/drm/tegra | |
parent | b50ad38d8718937928aab5de4ee89eb44fdada02 (diff) | |
download | linux-stable-2abdd44e3126e29cc310cbf5f1eda7ca7d979df3.tar.gz linux-stable-2abdd44e3126e29cc310cbf5f1eda7ca7d979df3.tar.bz2 linux-stable-2abdd44e3126e29cc310cbf5f1eda7ca7d979df3.zip |
drm/tegra: nvdec: Use tegra_dev_iommu_get_stream_id()
Use the newly implemented tegra_dev_iommu_get_stream_id() helper to
encapsulate and centralize the IOMMU stream ID access.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra')
-rw-r--r-- | drivers/gpu/drm/tegra/nvdec.c | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/drivers/gpu/drm/tegra/nvdec.c b/drivers/gpu/drm/tegra/nvdec.c index 10fd21517281..86c5818ac27b 100644 --- a/drivers/gpu/drm/tegra/nvdec.c +++ b/drivers/gpu/drm/tegra/nvdec.c @@ -67,26 +67,18 @@ static inline void nvdec_writel(struct nvdec *nvdec, u32 value, static int nvdec_boot_falcon(struct nvdec *nvdec) { -#ifdef CONFIG_IOMMU_API - struct iommu_fwspec *spec = dev_iommu_fwspec_get(nvdec->dev); -#endif + u32 stream_id; int err; -#ifdef CONFIG_IOMMU_API - if (nvdec->config->supports_sid && spec) { + if (nvdec->config->supports_sid && tegra_dev_iommu_get_stream_id(nvdec->dev, &stream_id)) { u32 value; value = TRANSCFG_ATT(1, TRANSCFG_SID_FALCON) | TRANSCFG_ATT(0, TRANSCFG_SID_HW); nvdec_writel(nvdec, value, NVDEC_TFBIF_TRANSCFG); - if (spec->num_ids > 0) { - value = spec->ids[0] & 0xffff; - - nvdec_writel(nvdec, value, VIC_THI_STREAMID0); - nvdec_writel(nvdec, value, VIC_THI_STREAMID1); - } + nvdec_writel(nvdec, stream_id, VIC_THI_STREAMID0); + nvdec_writel(nvdec, stream_id, VIC_THI_STREAMID1); } -#endif err = falcon_boot(&nvdec->falcon); if (err < 0) |