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| author | Vinay Belgaumkar <vinay.belgaumkar@intel.com> | 2023-11-13 11:44:02 -0800 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 11:43:39 -0500 |
| commit | 43efd3ba9f44c46fdb31c8b0f257cf9a2d1b58ae (patch) | |
| tree | f8d66d1c39475569f51c67546a2a180d2d4ff88a /drivers/gpu/drm/xe/regs/xe_gt_regs.h | |
| parent | 08987a8b68207e782decb0f4037964ef036a9de4 (diff) | |
| download | linux-stable-43efd3ba9f44c46fdb31c8b0f257cf9a2d1b58ae.tar.gz linux-stable-43efd3ba9f44c46fdb31c8b0f257cf9a2d1b58ae.tar.bz2 linux-stable-43efd3ba9f44c46fdb31c8b0f257cf9a2d1b58ae.zip | |
drm/xe: Raise GT frequency before GuC/HuC load
Starting GT freq is usually RPn. Raising freq to RP0 will
help speed up GuC load times. As an example, this data was
collected on DG2-
GuC Load time @RPn ~ 41 ms
GuC Load time @RP0 ~ 11 ms
v2: Raise GT freq before hwconfig init. This will speed up
both HuC and GuC loads. Address review comments (Rodrigo).
Also add a small usleep after requesting frequency which gives
pcode some time to react.
v3: Address checkpatch issue
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/regs/xe_gt_regs.h')
| -rw-r--r-- | drivers/gpu/drm/xe/regs/xe_gt_regs.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h index 902c60543de0..cc27fe8fc363 100644 --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h @@ -263,6 +263,11 @@ #define RPNSWREQ XE_REG(0xa008) #define REQ_RATIO_MASK REG_GENMASK(31, 23) + +#define RP_CONTROL XE_REG(0xa024) +#define RPSWCTL_MASK REG_GENMASK(10, 9) +#define RPSWCTL_ENABLE REG_FIELD_PREP(RPSWCTL_MASK, 2) +#define RPSWCTL_DISABLE REG_FIELD_PREP(RPSWCTL_MASK, 0) #define RC_CONTROL XE_REG(0xa090) #define RC_STATE XE_REG(0xa094) |