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| author | Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> | 2023-12-12 23:55:24 +0530 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 11:46:09 -0500 |
| commit | 4cb12b71923b6e2354093fbbde9bcadaec3d813f (patch) | |
| tree | 6cb3ecf277b6bf506b8edec9880335073cdf5cbb /drivers/gpu/drm/xe/regs/xe_gt_regs.h | |
| parent | 7a18d36f88105c0964846dbf9f7f1b0d43e860db (diff) | |
| download | linux-stable-4cb12b71923b6e2354093fbbde9bcadaec3d813f.tar.gz linux-stable-4cb12b71923b6e2354093fbbde9bcadaec3d813f.tar.bz2 linux-stable-4cb12b71923b6e2354093fbbde9bcadaec3d813f.zip | |
drm/xe/xe2: Determine bios enablement for flat ccs on igfx
If bios disables flat ccs on igfx make has_flat_ccs as 0 and notify
via drm_dbg.
Bspec:59255
v2:
- Release forcewake.
- Add registers in order.
- drop dgfx condition and only add it back in the future
when the support for an Xe2 dgpu will be added.
- Use drm_dbg instead of drm_info. (Matt)
v3:
- Address nit(Matt)
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Acked-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/regs/xe_gt_regs.h')
| -rw-r--r-- | drivers/gpu/drm/xe/regs/xe_gt_regs.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h index 5f5a72e9d0d8..f5bf4c6d1761 100644 --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h @@ -162,6 +162,9 @@ #define XEHP_SQCM XE_REG_MCR(0x8724) #define EN_32B_ACCESS REG_BIT(30) +#define XE2_FLAT_CCS_BASE_RANGE_LOWER XE_REG_MCR(0x8800) +#define XE2_FLAT_CCS_ENABLE REG_BIT(0) + #define GSCPSMI_BASE XE_REG(0x880c) #define MIRROR_FUSE3 XE_REG(0x9118) |