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| author | Michal Wajdeczko <michal.wajdeczko@intel.com> | 2023-12-18 17:53:38 +0100 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 16:31:29 -0500 |
| commit | 7158a688935ca90c5036e67b2b95c3119b3a0ac7 (patch) | |
| tree | ba9c2c1140bd04b02bb6ca4e03fb496611056a39 /drivers/gpu/drm/xe/regs/xe_gt_regs.h | |
| parent | e3408839dd27b2645636f91c85a7fd847e36cb91 (diff) | |
| download | linux-stable-7158a688935ca90c5036e67b2b95c3119b3a0ac7.tar.gz linux-stable-7158a688935ca90c5036e67b2b95c3119b3a0ac7.tar.bz2 linux-stable-7158a688935ca90c5036e67b2b95c3119b3a0ac7.zip | |
drm/xe: Update definition of GT_INTR_DW
Add bits definitions that we will be using in upcoming patch.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20231214185955.1791-5-michal.wajdeczko@intel.com
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/regs/xe_gt_regs.h')
| -rw-r--r-- | drivers/gpu/drm/xe/regs/xe_gt_regs.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h index 1dd361046b5d..6aaaf1f63c72 100644 --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h @@ -430,6 +430,15 @@ #define VOLTAGE_MASK REG_GENMASK(10, 0) #define GT_INTR_DW(x) XE_REG(0x190018 + ((x) * 4)) +#define INTR_GSC REG_BIT(31) +#define INTR_GUC REG_BIT(25) +#define INTR_MGUC REG_BIT(24) +#define INTR_BCS8 REG_BIT(23) +#define INTR_BCS(x) REG_BIT(15 - (x)) +#define INTR_CCS(x) REG_BIT(4 + (x)) +#define INTR_RCS0 REG_BIT(0) +#define INTR_VECS(x) REG_BIT(31 - (x)) +#define INTR_VCS(x) REG_BIT(x) #define RENDER_COPY_INTR_ENABLE XE_REG(0x190030) #define VCS_VECS_INTR_ENABLE XE_REG(0x190034) |