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| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-05-08 15:53:21 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-19 18:33:50 -0500 |
| commit | ee21379acc1a5c0de612097de74213aa7015471b (patch) | |
| tree | 279be2c31e6436b68eab4d42d5376b743fb2d96c /drivers/gpu/drm/xe/xe_mmio.h | |
| parent | ce8bf5bd059542431230eac216693a579dc09dba (diff) | |
| download | linux-stable-ee21379acc1a5c0de612097de74213aa7015471b.tar.gz linux-stable-ee21379acc1a5c0de612097de74213aa7015471b.tar.bz2 linux-stable-ee21379acc1a5c0de612097de74213aa7015471b.zip | |
drm/xe: Rename reg field to addr
Rename the address field to "addr" rather than "reg" so it's easier to
understand what it is.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/20230508225322.2692066-4-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_mmio.h')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_mmio.h | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h index f9a23b4ef77d..1407f1189b0d 100644 --- a/drivers/gpu/drm/xe/xe_mmio.h +++ b/drivers/gpu/drm/xe/xe_mmio.h @@ -20,27 +20,27 @@ int xe_mmio_init(struct xe_device *xe); static inline u8 xe_mmio_read8(struct xe_gt *gt, struct xe_reg reg) { - if (reg.reg < gt->mmio.adj_limit) - reg.reg += gt->mmio.adj_offset; + if (reg.addr < gt->mmio.adj_limit) + reg.addr += gt->mmio.adj_offset; - return readb(gt->mmio.regs + reg.reg); + return readb(gt->mmio.regs + reg.addr); } static inline void xe_mmio_write32(struct xe_gt *gt, struct xe_reg reg, u32 val) { - if (reg.reg < gt->mmio.adj_limit) - reg.reg += gt->mmio.adj_offset; + if (reg.addr < gt->mmio.adj_limit) + reg.addr += gt->mmio.adj_offset; - writel(val, gt->mmio.regs + reg.reg); + writel(val, gt->mmio.regs + reg.addr); } static inline u32 xe_mmio_read32(struct xe_gt *gt, struct xe_reg reg) { - if (reg.reg < gt->mmio.adj_limit) - reg.reg += gt->mmio.adj_offset; + if (reg.addr < gt->mmio.adj_limit) + reg.addr += gt->mmio.adj_offset; - return readl(gt->mmio.regs + reg.reg); + return readl(gt->mmio.regs + reg.addr); } static inline u32 xe_mmio_rmw32(struct xe_gt *gt, struct xe_reg reg, u32 clr, @@ -58,18 +58,18 @@ static inline u32 xe_mmio_rmw32(struct xe_gt *gt, struct xe_reg reg, u32 clr, static inline void xe_mmio_write64(struct xe_gt *gt, struct xe_reg reg, u64 val) { - if (reg.reg < gt->mmio.adj_limit) - reg.reg += gt->mmio.adj_offset; + if (reg.addr < gt->mmio.adj_limit) + reg.addr += gt->mmio.adj_offset; - writeq(val, gt->mmio.regs + reg.reg); + writeq(val, gt->mmio.regs + reg.addr); } static inline u64 xe_mmio_read64(struct xe_gt *gt, struct xe_reg reg) { - if (reg.reg < gt->mmio.adj_limit) - reg.reg += gt->mmio.adj_offset; + if (reg.addr < gt->mmio.adj_limit) + reg.addr += gt->mmio.adj_offset; - return readq(gt->mmio.regs + reg.reg); + return readq(gt->mmio.regs + reg.addr); } static inline int xe_mmio_write32_and_verify(struct xe_gt *gt, @@ -127,7 +127,7 @@ int xe_mmio_ioctl(struct drm_device *dev, void *data, static inline bool xe_mmio_in_range(const struct xe_mmio_range *range, struct xe_reg reg) { - return range && reg.reg >= range->start && reg.reg <= range->end; + return range && reg.addr >= range->start && reg.addr <= range->end; } int xe_mmio_probe_vram(struct xe_device *xe); |