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| author | Lewis Huang <lewis.huang@amd.com> | 2024-03-21 16:14:43 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-04-09 22:14:39 -0400 |
| commit | 0d38f6009e4e4e511fb5c3c673d54bf0c242c4b7 (patch) | |
| tree | 95615946d9ff50bedff2cd84145986975e01ebe9 /drivers/gpu/drm | |
| parent | d1999b4017d485a3168b4ba1316937c82454165a (diff) | |
| download | linux-stable-0d38f6009e4e4e511fb5c3c673d54bf0c242c4b7.tar.gz linux-stable-0d38f6009e4e4e511fb5c3c673d54bf0c242c4b7.tar.bz2 linux-stable-0d38f6009e4e4e511fb5c3c673d54bf0c242c4b7.zip | |
drm/amd/display: Add option to configure mapping policy for edp0 on dp1
[Why]
We want flexibility to choose how pwrseq instance is mapped to eDP panel
[How]
Add configuration option to choose the pwrseq mapping policy.
When enabled, allow fixed mapping between DIG inst to pwrseq inst.
Reviewed-by: Anthony Koo <anthony.koo@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Lewis Huang <lewis.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c | 9 |
2 files changed, 9 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 46be4845ec28..db87f9cdd567 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -437,6 +437,7 @@ struct dc_config { bool usb4_bw_alloc_support; bool allow_0_dtb_clk; bool use_assr_psp_message; + bool support_edp0_on_dp1; }; enum visual_confirm { diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c index 281be20b1a10..20c6fe48567f 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c @@ -173,5 +173,12 @@ void dcn31_panel_cntl_construct( break; } - dcn31_panel_cntl->base.pwrseq_inst = pwrseq_inst; + if (dcn31_panel_cntl->base.ctx->dc->config.support_edp0_on_dp1) + //If supported, power sequencer mapping shall follow the DIG instance + dcn31_panel_cntl->base.pwrseq_inst = pwrseq_inst; + else + /* If not supported, pwrseq will be assigned in order, + * so first pwrseq will be assigned to first panel instance (legacy behavior) + */ + dcn31_panel_cntl->base.pwrseq_inst = dcn31_panel_cntl->base.inst; } |