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author | Likun Gao <Likun.Gao@amd.com> | 2019-10-24 11:56:07 +0800 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2020-05-01 15:19:07 -0400 |
commit | 3ab6fe4b28a6614126a07c8210b013abf8da35f4 (patch) | |
tree | a69e15f85859b8bf96264a7c0a35091841bdec57 /drivers/gpu/drm | |
parent | 98bf250edd64344124fe5f619d6320d02e17af5e (diff) | |
download | linux-stable-3ab6fe4b28a6614126a07c8210b013abf8da35f4.tar.gz linux-stable-3ab6fe4b28a6614126a07c8210b013abf8da35f4.tar.bz2 linux-stable-3ab6fe4b28a6614126a07c8210b013abf8da35f4.zip |
drm/amdgpu: update the method to set kcq queue mask
Use a common method to set queue mask before set kiq resource.
The value of queue mask must suitablt for the designated form.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c index 0103acc57474..ed212c070e8e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c @@ -485,6 +485,19 @@ int amdgpu_gfx_disable_kcq(struct amdgpu_device *adev) return amdgpu_ring_test_helper(kiq_ring); } +int amdgpu_gfx_kcq_queue_mask_transform(struct amdgpu_device *adev, + int queue_bit) +{ + int mec, pipe, queue; + int queue_kcq_bit = 0; + + amdgpu_gfx_bit_to_mec_queue(adev, queue_bit, &mec, &pipe, &queue); + + queue_kcq_bit = mec * 4 * 8 + pipe * 8 + queue; + + return queue_kcq_bit; +} + int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev) { struct amdgpu_kiq *kiq = &adev->gfx.kiq; @@ -507,7 +520,7 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev) break; } - queue_mask |= (1ull << i); + queue_mask |= (1ull << amdgpu_gfx_kcq_queue_mask_transform(adev, i)); } DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe, |