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author | Alex Deucher <alexander.deucher@amd.com> | 2021-03-18 22:15:06 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2021-03-23 23:37:27 -0400 |
commit | c645e4b80c97adae029e655eccd26644b958f4b6 (patch) | |
tree | 63029de9edb4b8b5b22b3a5d75a599892958448d /drivers/gpu/drm | |
parent | 7a78e2bc861b180f3115240c92b184d378368ef7 (diff) | |
download | linux-stable-c645e4b80c97adae029e655eccd26644b958f4b6.tar.gz linux-stable-c645e4b80c97adae029e655eccd26644b958f4b6.tar.bz2 linux-stable-c645e4b80c97adae029e655eccd26644b958f4b6.zip |
drm/amdgpu/display: properly guard dc_dsc_stream_bandwidth_in_kbps
Move the function protoype to the right header and guard
the call with CONFIG_DRM_AMD_DC_DCN as DSC is only available
with DCN.
Fixes: 8c2f14c36f47ce ("drm/amd/display: Add changes for dsc bpp in 16ths and unify bw calculations")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Dillon Varone <dillon.varone@amd.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_dsc.h | 2 |
2 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 10e34e411e06..f9a33dc52c45 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -3498,17 +3498,17 @@ void dc_link_enable_hpd_filter(struct dc_link *link, bool enable) } } -uint32_t dc_dsc_stream_bandwidth_in_kbps(uint32_t pix_clk_100hz, uint32_t bpp_x16); - uint32_t dc_bandwidth_in_kbps_from_timing( const struct dc_crtc_timing *timing) { uint32_t bits_per_channel = 0; uint32_t kbps; +#if defined(CONFIG_DRM_AMD_DC_DCN) if (timing->flags.DSC) { return dc_dsc_stream_bandwidth_in_kbps(timing->pix_clk_100hz, timing->dsc_cfg.bits_per_pixel); } +#endif switch (timing->display_color_depth) { case COLOR_DEPTH_666: diff --git a/drivers/gpu/drm/amd/display/dc/dc_dsc.h b/drivers/gpu/drm/amd/display/dc/dc_dsc.h index 0c5d98524536..c51d2d961b7a 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_dsc.h +++ b/drivers/gpu/drm/amd/display/dc/dc_dsc.h @@ -88,4 +88,6 @@ void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit); void dc_dsc_policy_set_enable_dsc_when_not_needed(bool enable); +uint32_t dc_dsc_stream_bandwidth_in_kbps(uint32_t pix_clk_100hz, uint32_t bpp_x16); + #endif |