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author | Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> | 2022-09-22 09:24:12 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2022-10-06 12:04:15 -0400 |
commit | 07ebc18c047adcd72905619e72ae7c48db28ab48 (patch) | |
tree | 9ac6fcff51ad29ed709a8cdef3c5b9bb48a0fee8 /drivers/gpu | |
parent | 9691a7a776302c85c10294f1a92c15c7f57a5947 (diff) | |
download | linux-stable-07ebc18c047adcd72905619e72ae7c48db28ab48.tar.gz linux-stable-07ebc18c047adcd72905619e72ae7c48db28ab48.tar.bz2 linux-stable-07ebc18c047adcd72905619e72ae7c48db28ab48.zip |
drm/amd/display: Disconnect DSC for unused pipes during ODM transition
[Why]
During transition from ODM combine to ODM bypass, if DSC is enabled need
to disconnect the DSC mux for pipes no longer in use.
[How]
During ODM update, detect pipes with DSC that are no longer being used
for new state and call new DSC interface to disconnect.
Add new DSC interface to disconnect from pipe
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c index 33bdf56b2b3a..955ca273cfe1 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c @@ -1148,16 +1148,19 @@ void dcn32_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx * true); } - // Don't program pixel clock after link is already enabled -/* if (false == pipe_ctx->clock_source->funcs->program_pix_clk( - pipe_ctx->clock_source, - &pipe_ctx->stream_res.pix_clk_params, - &pipe_ctx->pll_settings)) { - BREAK_TO_DEBUGGER(); - }*/ + if (pipe_ctx->stream_res.dsc) { + struct pipe_ctx *current_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[pipe_ctx->pipe_idx]; - if (pipe_ctx->stream_res.dsc) update_dsc_on_stream(pipe_ctx, pipe_ctx->stream->timing.flags.DSC); + + /* Check if no longer using pipe for ODM, then need to disconnect DSC for that pipe */ + if (!pipe_ctx->next_odm_pipe && current_pipe_ctx->next_odm_pipe && + current_pipe_ctx->next_odm_pipe->stream_res.dsc) { + struct display_stream_compressor *dsc = current_pipe_ctx->next_odm_pipe->stream_res.dsc; + /* disconnect DSC block from stream */ + dsc->funcs->dsc_disconnect(dsc); + } + } } unsigned int dcn32_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsigned int *k1_div, unsigned int *k2_div) |