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| author | Nicholas Mc Guire <hofrat@osadl.org> | 2016-12-16 02:59:38 +0100 |
|---|---|---|
| committer | Ben Hutchings <ben@decadent.org.uk> | 2017-06-05 21:16:44 +0100 |
| commit | 3eef21d54c2a7f942c31279115f21a536cee2e39 (patch) | |
| tree | df7c5e3b83ca2d9f48b501683582ae56d7d0d5a3 /drivers/gpu | |
| parent | 03ad287a1bcbddacfabbe8bec40f251111c16692 (diff) | |
| download | linux-stable-3eef21d54c2a7f942c31279115f21a536cee2e39.tar.gz linux-stable-3eef21d54c2a7f942c31279115f21a536cee2e39.tar.bz2 linux-stable-3eef21d54c2a7f942c31279115f21a536cee2e39.zip | |
drm/i915: relax uncritical udelay_range()
commit 15a43cbf4736a3932e6259fa7d6e47558f6222b0 upstream.
udelay_range(1, 2) is inefficient and as discussions with Jani Nikula
<jani.nikula@linux.intel.com> unnecessary here. This replaces this
tight setting with a relaxed delay of min=20 and max=50 which helps
the hrtimer subsystem optimize timer handling.
Fixes: commit be4fc046bed3 ("drm/i915: add VLV DSI PLL Calculations")
Link: http://lkml.org/lkml/2016/12/15/147
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1481853578-19834-1-git-send-email-hofrat@osadl.org
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dsi_pll.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c index ba79ec19da3b..1441b1bae903 100644 --- a/drivers/gpu/drm/i915/intel_dsi_pll.c +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c @@ -265,8 +265,10 @@ void vlv_enable_dsi_pll(struct intel_encoder *encoder) vlv_configure_dsi_pll(encoder); - /* wait at least 0.5 us after ungating before enabling VCO */ - usleep_range(1, 10); + /* wait at least 0.5 us after ungating before enabling VCO, + * allow hrtimer subsystem optimization by relaxing timing + */ + usleep_range(10, 50); tmp = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL); tmp |= DSI_PLL_VCO_EN; |