diff options
author | Wenjing Liu <wenjing.liu@amd.com> | 2022-09-09 12:19:52 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2022-09-19 15:16:57 -0400 |
commit | 41da5fd2d93fa44946cd7d202178f982cdb587d0 (patch) | |
tree | 6c268c9cbdee048abe14b11c590a7db021948249 /drivers/gpu | |
parent | 8434f8180216a9c6ad498c5f50e05a2cdbf81e03 (diff) | |
download | linux-stable-41da5fd2d93fa44946cd7d202178f982cdb587d0.tar.gz linux-stable-41da5fd2d93fa44946cd7d202178f982cdb587d0.tar.bz2 linux-stable-41da5fd2d93fa44946cd7d202178f982cdb587d0.zip |
drm/amd/display: solve regression in update phy state refactor
[Why]
There is a coding error when moving dp disable link phy to
hw sequencer, where the receiver power control is missed during
this refactor.
[how]
1. Add back missing receiver power control in disable link phy.
2. minor modifications to ensure there is no undesired sequence
changes in dp link enable/disable.
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 6 |
2 files changed, 8 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c index 09630b04d9e5..9eab6f48de1a 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c @@ -7073,9 +7073,9 @@ void dp_enable_link_phy( enum clock_source_id clock_source, const struct dc_link_settings *link_settings) { + link->cur_link_settings = *link_settings; link->dc->hwss.enable_dp_link_output(link, link_res, signal, clock_source, link_settings); - link->cur_link_settings = *link_settings; dp_receiver_power_ctrl(link, true); } @@ -7149,6 +7149,9 @@ void dp_disable_link_phy(struct dc_link *link, const struct link_resource *link_ { struct dc *dc = link->ctx->dc; + if (!link->wa_flags.dp_keep_receiver_powered) + dp_receiver_power_ctrl(link, false); + dc->hwss.disable_link_output(link, link_res, signal); /* Clear current link setting.*/ memset(&link->cur_link_settings, 0, diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index 55c98dbfcc1c..2341982ee0a5 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c @@ -3098,6 +3098,7 @@ void dce110_enable_dp_link_output( if (dmcu != NULL && dmcu->funcs->unlock_phy) dmcu->funcs->unlock_phy(dmcu); + dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_ENABLE_LINK_PHY); } void dce110_disable_link_output(struct dc_link *link, @@ -3111,7 +3112,7 @@ void dce110_disable_link_output(struct dc_link *link, if (signal == SIGNAL_TYPE_EDP && link->dc->hwss.edp_backlight_control) link->dc->hwss.edp_backlight_control(link, false); - else if (dc_is_dp_signal(signal) && dmcu != NULL && dmcu->funcs->lock_phy) + else if (dmcu != NULL && dmcu->funcs->lock_phy) dmcu->funcs->lock_phy(dmcu); link_hwss->disable_link_output(link, link_res, signal); @@ -3120,8 +3121,9 @@ void dce110_disable_link_output(struct dc_link *link, if (signal == SIGNAL_TYPE_EDP && link->dc->hwss.edp_backlight_control) link->dc->hwss.edp_power_control(link, false); - else if (dc_is_dp_signal(signal) && dmcu != NULL && dmcu->funcs->lock_phy) + else if (dmcu != NULL && dmcu->funcs->lock_phy) dmcu->funcs->unlock_phy(dmcu); + dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_DISABLE_LINK_PHY); } static const struct hw_sequencer_funcs dce110_funcs = { |