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| author | Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> | 2024-03-22 16:49:55 -0600 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-04-09 22:06:53 -0400 |
| commit | 71fb6ed2e7bc1833e4d0faeb05c61c6df6f44c87 (patch) | |
| tree | a3106421e2793ce7351ed1af55b1beea567e2a03 /drivers/gpu | |
| parent | e9a48b6b957c81aeeda6d95604f1c53fa61ab1fd (diff) | |
| download | linux-stable-71fb6ed2e7bc1833e4d0faeb05c61c6df6f44c87.tar.gz linux-stable-71fb6ed2e7bc1833e4d0faeb05c61c6df6f44c87.tar.bz2 linux-stable-71fb6ed2e7bc1833e4d0faeb05c61c6df6f44c87.zip | |
drm/amd/display: Add WBSCL ram coefficient for writeback
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c index f8667be57046..80779e85e2c5 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c @@ -299,6 +299,17 @@ void dwb2_set_scaler(struct dwbc *dwbc, struct dc_dwb_params *params) } } + + if (dwbc20->dwbc_mask->WBSCL_COEF_RAM_SEL) { + /* Swap double buffered coefficient set */ + uint32_t wbscl_mode = REG_READ(WBSCL_MODE); + bool coef_ram_current = get_reg_field_value_ex( + wbscl_mode, dwbc20->dwbc_mask->WBSCL_COEF_RAM_SEL_CURRENT, + dwbc20->dwbc_shift->WBSCL_COEF_RAM_SEL_CURRENT); + + REG_UPDATE(WBSCL_MODE, WBSCL_COEF_RAM_SEL, !coef_ram_current); + } + } static const struct dwbc_funcs dcn20_dwbc_funcs = { |