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author | Konrad Dybcio <konrad.dybcio@somainline.org> | 2021-02-04 00:15:36 +0100 |
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committer | Rob Clark <robdclark@chromium.org> | 2021-02-05 09:59:49 -0800 |
commit | 7df222c35920569c7f31d177a7249c70139008f1 (patch) | |
tree | 824a7afa26e41833392baf3263318d0e7b90908e /drivers/gpu | |
parent | 5ca6d0268df8d7a4e1e453bc8a1ee3459fde12a2 (diff) | |
download | linux-stable-7df222c35920569c7f31d177a7249c70139008f1.tar.gz linux-stable-7df222c35920569c7f31d177a7249c70139008f1.tar.bz2 linux-stable-7df222c35920569c7f31d177a7249c70139008f1.zip |
drm/msm/disp/mdp5: mdp5_cfg: Fix msm8974v2 max_clk
The maximum mdp clock rate on msm8974v2 is 320MHz. Fix it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c index df10c1ac7591..94ce62a26daf 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c @@ -177,7 +177,7 @@ static const struct mdp5_cfg_hw msm8x74v2_config = { [3] = INTF_HDMI, }, }, - .max_clk = 200000000, + .max_clk = 320000000, }; static const struct mdp5_cfg_hw apq8084_config = { |