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| author | Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> | 2024-03-21 14:30:45 -0600 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-04-09 22:05:22 -0400 |
| commit | a96e384cbbc21bf537e4ae75c5306a559ede5a5e (patch) | |
| tree | c0b73491e6c13fdbba30fee08136622cf4efdb84 /drivers/gpu | |
| parent | 7315a4fb1532d748505076b543ac1461f8d20700 (diff) | |
| download | linux-stable-a96e384cbbc21bf537e4ae75c5306a559ede5a5e.tar.gz linux-stable-a96e384cbbc21bf537e4ae75c5306a559ede5a5e.tar.bz2 linux-stable-a96e384cbbc21bf537e4ae75c5306a559ede5a5e.zip | |
drm/amd/display: Initialize DP ref clk with the correct clock
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c index b77804cfde0f..2a5dd3a296b2 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c @@ -131,8 +131,8 @@ int dce_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base) struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); int dprefclk_wdivider; int dprefclk_src_sel; - int dp_ref_clk_khz; - int target_div = 600000; + int dp_ref_clk_khz = 600000; + int target_div; /* ASSERT DP Reference Clock source is from DFS*/ REG_GET(DPREFCLK_CNTL, DPREFCLK_SRC_SEL, &dprefclk_src_sel); |