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| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2011-09-02 13:03:05 -0700 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2011-10-20 15:26:43 -0700 |
| commit | d9d444cbc536050ef66e4cefcd55224c46cbbadf (patch) | |
| tree | 590b93af00d9591c55a10c9d383698d0d11d8325 /drivers/gpu | |
| parent | 27f8227b1e2b326a9a0995dd9c1f14893c61ee01 (diff) | |
| download | linux-stable-d9d444cbc536050ef66e4cefcd55224c46cbbadf.tar.gz linux-stable-d9d444cbc536050ef66e4cefcd55224c46cbbadf.tar.bz2 linux-stable-d9d444cbc536050ef66e4cefcd55224c46cbbadf.zip | |
drm/i915: split refclk code out of ironlake_crtc_mode_set
Just a cleanup to make the mode_set function more manageable.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 39 |
1 files changed, 35 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 6b1a1edeafef..3b62b919fad5 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5241,6 +5241,40 @@ void ironlake_init_pch_refclk(struct drm_device *dev) } } +static int ironlake_get_refclk(struct drm_crtc *crtc) +{ + struct drm_device *dev = crtc->dev; + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_encoder *encoder; + struct drm_mode_config *mode_config = &dev->mode_config; + struct intel_encoder *edp_encoder = NULL; + int num_connectors = 0; + bool is_lvds = false; + + list_for_each_entry(encoder, &mode_config->encoder_list, base.head) { + if (encoder->base.crtc != crtc) + continue; + + switch (encoder->type) { + case INTEL_OUTPUT_LVDS: + is_lvds = true; + break; + case INTEL_OUTPUT_EDP: + edp_encoder = encoder; + break; + } + num_connectors++; + } + + if (is_lvds && intel_panel_use_ssc(dev_priv) && num_connectors < 2) { + DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n", + dev_priv->lvds_ssc_freq); + return dev_priv->lvds_ssc_freq * 1000; + } + + return 120000; +} + static int ironlake_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, @@ -5300,10 +5334,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, num_connectors++; } - /* - * Every reference clock in a PCH system is 120MHz - */ - refclk = 120000; + refclk = ironlake_get_refclk(crtc); /* * Returns a set of divisors for the desired target clock with the given |