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author | Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> | 2023-06-05 09:41:29 +0530 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2023-06-15 11:06:58 -0400 |
commit | ebbb0b103efdcf9b682c7fe8ea84b1cf355304c6 (patch) | |
tree | 75e3c2e9626186b22725e7baece760ebdf95c469 /drivers/gpu | |
parent | 2e1e62c8e5e79bce38b574dd4281e6a27fd7f665 (diff) | |
download | linux-stable-ebbb0b103efdcf9b682c7fe8ea84b1cf355304c6.tar.gz linux-stable-ebbb0b103efdcf9b682c7fe8ea84b1cf355304c6.tar.bz2 linux-stable-ebbb0b103efdcf9b682c7fe8ea84b1cf355304c6.zip |
drm/amd/display: Clean up dcn10_optc.c kdoc
Fixes the following W=1 kernel build warning:
display/dc/dcn10/dcn10_optc.c:45: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
* apply_front_porch_workaround TODO FPGA still need?
display/dc/dcn10/dcn10_optc.c:136: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
* program_timing_generator used by mode timing set
display/dc/dcn10/dcn10_optc.c:391: warning: Function parameter or member 'optc' not described in 'optc1_set_timing_double_buffer'
display/dc/dcn10/dcn10_optc.c:391: warning: Function parameter or member 'enable' not described in 'optc1_set_timing_double_buffer'
display/dc/dcn10/dcn10_optc.c:404: warning: Function parameter or member 'optc' not described in 'optc1_unblank_crtc'
display/dc/dcn10/dcn10_optc.c:404: warning: expecting prototype for unblank_crtc(). Prototype was for optc1_unblank_crtc() instead
display/dc/dcn10/dcn10_optc.c:427: warning: Function parameter or member 'optc' not described in 'optc1_blank_crtc'
display/dc/dcn10/dcn10_optc.c:427: warning: expecting prototype for blank_crtc(). Prototype was for optc1_blank_crtc() instead
display/dc/dcn10/dcn10_optc.c:496: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
* Enable CRTC
display/dc/dcn10/dcn10_optc.c:895: warning: Cannot understand *****************************************************************************
on line 895 - I thought it was a doc line
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 57 |
1 files changed, 36 insertions, 21 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c index 633989fd2514..0e8f4f36c87c 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c @@ -42,11 +42,13 @@ #define STATIC_SCREEN_EVENT_MASK_RANGETIMING_DOUBLE_BUFFER_UPDATE_EN 0x100 /** -* apply_front_porch_workaround TODO FPGA still need? -* -* This is a workaround for a bug that has existed since R5xx and has not been -* fixed keep Front porch at minimum 2 for Interlaced mode or 1 for progressive. -*/ + * apply_front_porch_workaround() - This is a workaround for a bug that has + * existed since R5xx and has not been fixed + * keep Front porch at minimum 2 for Interlaced + * mode or 1 for progressive. + * + * @timing: Timing parameters used to configure DCN blocks. + */ static void apply_front_porch_workaround(struct dc_crtc_timing *timing) { if (timing->flags.INTERLACE == 1) { @@ -133,9 +135,20 @@ void optc1_setup_vertical_interrupt2( } /** - * program_timing_generator used by mode timing set - * Program CRTC Timing Registers - OTG_H_*, OTG_V_*, Pixel repetition. - * Including SYNC. Call BIOS command table to program Timings. + * optc1_program_timing() - used by mode timing set Program + * CRTC Timing Registers - OTG_H_*, + * OTG_V_*, Pixel repetition. + * Including SYNC. Call BIOS command table to program Timings. + * + * @optc: timing_generator instance. + * @dc_crtc_timing: Timing parameters used to configure DCN blocks. + * @vready_offset: Vready's starting position. + * @vstartup_start: Vstartup period. + * @vupdate_offset: Vupdate starting position. + * @vupdate_width: Vupdate duration. + * @signal: DC signal types. + * @use_vbios: to program timings from BIOS command table. + * */ void optc1_program_timing( struct timing_generator *optc, @@ -385,6 +398,9 @@ void optc1_set_blank_data_double_buffer(struct timing_generator *optc, bool enab * Sets double buffer point for V_TOTAL, H_TOTAL, VTOTAL_MIN, * VTOTAL_MAX, VTOTAL_MIN_SEL and VTOTAL_MAX_SEL registers. * + * @optc: timing_generator instance. + * @enable: Enable DRR double buffering control if true, disable otherwise. + * * Options: any time, start of frame, dp start of frame (range timing) */ void optc1_set_timing_double_buffer(struct timing_generator *optc, bool enable) @@ -397,8 +413,9 @@ void optc1_set_timing_double_buffer(struct timing_generator *optc, bool enable) } /** - * unblank_crtc - * Call ASIC Control Object to UnBlank CRTC. + * optc1_unblank_crtc() - Call ASIC Control Object to UnBlank CRTC. + * + * @optc: timing_generator instance. */ static void optc1_unblank_crtc(struct timing_generator *optc) { @@ -419,8 +436,9 @@ static void optc1_unblank_crtc(struct timing_generator *optc) } /** - * blank_crtc - * Call ASIC Control Object to Blank CRTC. + * optc1_blank_crtc() - Call ASIC Control Object to Blank CRTC. + * + * @optc: timing_generator instance. */ static void optc1_blank_crtc(struct timing_generator *optc) @@ -493,8 +511,9 @@ void optc1_enable_optc_clock(struct timing_generator *optc, bool enable) } /** - * Enable CRTC - * Enable CRTC - call ASIC Control Object to enable Timing generator. + * optc1_enable_crtc() - Enable CRTC - call ASIC Control Object to enable Timing generator. + * + * @optc: timing_generator instance. */ static bool optc1_enable_crtc(struct timing_generator *optc) { @@ -890,15 +909,11 @@ static void optc1_program_manual_trigger(struct timing_generator *optc) MANUAL_FLOW_CONTROL, 0); } - /** - ***************************************************************************** - * Function: set_drr + * optc1_set_drr() - Program dynamic refresh rate registers m_OTGx_OTG_V_TOTAL_*. * - * @brief - * Program dynamic refresh rate registers m_OTGx_OTG_V_TOTAL_*. - * - ***************************************************************************** + * @optc: timing_generator instance. + * @params: parameters used for Dynamic Refresh Rate. */ void optc1_set_drr( struct timing_generator *optc, |