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| author | Peter Rosin <peda@axentia.se> | 2018-05-16 09:16:47 +0200 |
|---|---|---|
| committer | Wolfram Sang <wsa@the-dreams.de> | 2018-05-29 20:30:49 +0200 |
| commit | 30a6475744cf11f31a296cb85b43bab40ebbea92 (patch) | |
| tree | 655bc88b8866daf280ac5d3d14e07959499ccaf4 /drivers/i2c/busses/i2c-aspeed.c | |
| parent | ac6d5298f6af763b587495d62041fe57a2fb89e6 (diff) | |
| download | linux-stable-30a6475744cf11f31a296cb85b43bab40ebbea92.tar.gz linux-stable-30a6475744cf11f31a296cb85b43bab40ebbea92.tar.bz2 linux-stable-30a6475744cf11f31a296cb85b43bab40ebbea92.zip | |
i2c: busses: make use of i2c_8bit_addr_from_msg
Because it looks neater.
For diolan, this allows factoring out some code that is now common
between if and else.
For eg20t, pch_i2c_writebytes is always called with a write in
msgs->flags, and pch_i2c_readbytes with a read.
For imx, i2c_imx_dma_write and i2c_imx_write are always called with a
write in msgs->flags, and i2c_imx_read with a read.
For qup, qup_i2c_write_tx_fifo_v1 is always called with a write in
qup->msg->flags.
For stu300, also restructure debug output for resends, since that
code as a result is only handling debug output.
Reviewed-by: Guenter Roeck <linux@roeck-us.net> [diolan]
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> [efm32 and imx]
Acked-by: Linus Walleij <linus.walleij@linaro.org> [stu300]
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c/busses/i2c-aspeed.c')
| -rw-r--r-- | drivers/i2c/busses/i2c-aspeed.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c index 7d4aeb4465b3..60e4d0e939a3 100644 --- a/drivers/i2c/busses/i2c-aspeed.c +++ b/drivers/i2c/busses/i2c-aspeed.c @@ -335,13 +335,12 @@ static void aspeed_i2c_do_start(struct aspeed_i2c_bus *bus) { u32 command = ASPEED_I2CD_M_START_CMD | ASPEED_I2CD_M_TX_CMD; struct i2c_msg *msg = &bus->msgs[bus->msgs_index]; - u8 slave_addr = msg->addr << 1; + u8 slave_addr = i2c_8bit_addr_from_msg(msg); bus->master_state = ASPEED_I2C_MASTER_START; bus->buf_index = 0; if (msg->flags & I2C_M_RD) { - slave_addr |= 1; command |= ASPEED_I2CD_M_RX_CMD; /* Need to let the hardware know to NACK after RX. */ if (msg->len == 1 && !(msg->flags & I2C_M_RECV_LEN)) |