diff options
author | Yunfei Dong <yunfei.dong@mediatek.com> | 2023-07-29 10:55:14 +0800 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@kernel.org> | 2023-08-10 07:58:34 +0200 |
commit | 0934d37596151edce115c6d0843a9ad7d5e5d232 (patch) | |
tree | af7e86ef4722c918a0a9f9da9552e1874504f8e8 /drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.h | |
parent | 183b0b4bd1ff32b4d50441e42449d2501df4222b (diff) | |
download | linux-stable-0934d37596151edce115c6d0843a9ad7d5e5d232.tar.gz linux-stable-0934d37596151edce115c6d0843a9ad7d5e5d232.tar.bz2 linux-stable-0934d37596151edce115c6d0843a9ad7d5e5d232.zip |
media: mediatek: vcodec: separate decoder and encoder
Move all decoder files to folder decoder.
Move all encoder files to folder encoder.
Move common files which shared for encoder and decoder to folder common.
Change include header files and Makefile to fix build error.
Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Diffstat (limited to 'drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.h')
-rw-r--r-- | drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.h | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.h b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.h new file mode 100644 index 000000000000..83fe8b9428e6 --- /dev/null +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.h @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2021 MediaTek Inc. + * Author: Yunfei Dong <yunfei.dong@mediatek.com> + */ + +#ifndef _MTK_VCODEC_DEC_HW_H_ +#define _MTK_VCODEC_DEC_HW_H_ + +#include <linux/io.h> +#include <linux/platform_device.h> + +#include "mtk_vcodec_dec_drv.h" + +#define VDEC_HW_ACTIVE_ADDR 0x0 +#define VDEC_HW_ACTIVE_MASK BIT(4) +#define VDEC_IRQ_CFG 0x11 +#define VDEC_IRQ_CLR 0x10 +#define VDEC_IRQ_CFG_REG 0xa4 + +#define IS_SUPPORT_VDEC_HW_IRQ(hw_idx) ((hw_idx) != MTK_VDEC_LAT_SOC) + +/** + * enum mtk_vdec_hw_reg_idx - subdev hardware register base index + * @VDEC_HW_SYS : vdec soc register index + * @VDEC_HW_MISC: vdec misc register index + * @VDEC_HW_MAX : vdec supported max register index + */ +enum mtk_vdec_hw_reg_idx { + VDEC_HW_SYS, + VDEC_HW_MISC, + VDEC_HW_MAX +}; + +/** + * struct mtk_vdec_hw_dev - vdec hardware driver data + * @plat_dev: platform device + * @main_dev: main device + * @reg_base: mapped address of MTK Vcodec registers. + * + * @curr_ctx: the context that is waiting for codec hardware + * + * @dec_irq : decoder irq resource + * @pm : power management control + * @hw_idx : each hardware index + */ +struct mtk_vdec_hw_dev { + struct platform_device *plat_dev; + struct mtk_vcodec_dec_dev *main_dev; + void __iomem *reg_base[VDEC_HW_MAX]; + + struct mtk_vcodec_dec_ctx *curr_ctx; + + int dec_irq; + struct mtk_vcodec_pm pm; + int hw_idx; +}; + +#endif /* _MTK_VCODEC_DEC_HW_H_ */ |