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authorTomer Tayar <ttayar@habana.ai>2022-06-30 18:40:59 +0300
committerOded Gabbay <ogabbay@kernel.org>2022-07-12 09:09:30 +0300
commitbfbf5a0a711f111564de5d8f6bab7063ba4af2d8 (patch)
tree1cfdc02c21ca3ff4ea7e044f1b7dce8541c2645f /drivers/misc
parent25ad86383968698b95264cb54c8d662381e20312 (diff)
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habanalabs/gaudi2: modify CS completion CQ to use virtual MSI-X doorbell
Modify the CQ which is used for CS completion, to use the virtual MSI-X doorbell. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/habanalabs/gaudi2/gaudi2.c19
1 files changed, 16 insertions, 3 deletions
diff --git a/drivers/misc/habanalabs/gaudi2/gaudi2.c b/drivers/misc/habanalabs/gaudi2/gaudi2.c
index d9c398bf7750..343e55a14ca5 100644
--- a/drivers/misc/habanalabs/gaudi2/gaudi2.c
+++ b/drivers/misc/habanalabs/gaudi2/gaudi2.c
@@ -4254,7 +4254,7 @@ static void gaudi2_init_edma(struct hl_device *hdev)
static void gaudi2_init_sm(struct hl_device *hdev)
{
- u64 msix_db_reg = CFG_BASE + mmPCIE_DBI_MSIX_DOORBELL_OFF;
+ struct gaudi2_device *gaudi2 = hdev->asic_specific;
u64 cq_address;
u32 reg_val;
int i;
@@ -4272,8 +4272,21 @@ static void gaudi2_init_sm(struct hl_device *hdev)
/* Init CQ0 DB */
/* Configure the monitor to trigger MSI-X interrupt */
- WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0, lower_32_bits(msix_db_reg));
- WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_0, upper_32_bits(msix_db_reg));
+ /* TODO:
+ * Remove the if statement when virtual MSI-X doorbell is supported in simulator (SW-93022)
+ * and in F/W (SW-93024).
+ */
+ if (!hdev->pdev || hdev->asic_prop.fw_security_enabled) {
+ u64 msix_db_reg = CFG_BASE + mmPCIE_DBI_MSIX_DOORBELL_OFF;
+
+ WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0, lower_32_bits(msix_db_reg));
+ WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_0, upper_32_bits(msix_db_reg));
+ } else {
+ WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0,
+ lower_32_bits(gaudi2->virt_msix_db_dma_addr));
+ WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_0,
+ upper_32_bits(gaudi2->virt_msix_db_dma_addr));
+ }
WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_0, GAUDI2_IRQ_NUM_COMPLETION);
for (i = 0 ; i < GAUDI2_RESERVED_CQ_NUMBER ; i++) {