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| author | Ben Chuang <ben.chuang@genesyslogic.com.tw> | 2019-08-27 08:32:55 +0800 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2019-09-11 15:58:39 +0200 |
| commit | 1beabbdba708bc9b6d7fc04695cc98d1287d92f2 (patch) | |
| tree | f309d239cbdbcd76d505ad5fdc812664cf3fbdd0 /drivers/mmc/host/sdhci.h | |
| parent | 4a9e0d1a6256024582c225ce0d86b51e109062c4 (diff) | |
| download | linux-stable-1beabbdba708bc9b6d7fc04695cc98d1287d92f2.tar.gz linux-stable-1beabbdba708bc9b6d7fc04695cc98d1287d92f2.tar.bz2 linux-stable-1beabbdba708bc9b6d7fc04695cc98d1287d92f2.zip | |
mmc: sdhci: Add PLL Enable support to internal clock setup
The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable
setup as part of the internal clock setup as described in 3.2.1 Internal
Clock Setup Sequence of SD Host Controller Simplified Specification
Version 4.20.
Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Co-developed-by: Michael K Johnson <johnsonm@danlj.org>
Signed-off-by: Michael K Johnson <johnsonm@danlj.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/sdhci.h')
| -rw-r--r-- | drivers/mmc/host/sdhci.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 902f855efe8f..929310e869a3 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -114,6 +114,7 @@ #define SDHCI_DIV_HI_MASK 0x300 #define SDHCI_PROG_CLOCK_MODE 0x0020 #define SDHCI_CLOCK_CARD_EN 0x0004 +#define SDHCI_CLOCK_PLL_EN 0x0008 #define SDHCI_CLOCK_INT_STABLE 0x0002 #define SDHCI_CLOCK_INT_EN 0x0001 |