Merge tag 'mtd/for-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull mtd updates from Miquel Raynal:
 "Core MTD changes:
   - dt-bindings: Drop unneeded quotes
   - mtdblock: Tolerate corrected bit-flips
   - Use of_property_read_bool() for boolean properties
   - Avoid magic values
   - Avoid printing error messages on probe deferrals
   - Prepare mtd_otp_nvmem_add() to handle -EPROBE_DEFER
   - Fix error path for nvmem provider
   - Fix nvmem error reporting
   - Provide unique name for nvmem device

  MTD device changes:
   - lpddr_cmds: Remove unused words variable
   - bcm63xxpart: Remove MODULE_LICENSE in non-modules

  SPI NOR core changes:
   - Introduce Read While Write support for flashes featuring several
     banks
   - Set the 4-Byte Address Mode method based on SFDP data
   - Allow post_sfdp hook to return errors
   - Parse SCCR MC table and introduce support for multi-chip devices

  SPI NOR manufacturer drivers changes:
   - macronix: Add support for mx25uw51245g with RWW
   - spansion:
      - Determine current address mode at runtime as it can be changed
        in a non-volatile way and differ from factory defaults or from
        what SFDP advertises.
      - Enable JFFS2 write buffer mode for few ECC'd NOR flashes:
        S25FS256T, s25hx and s28hx
      - Add support for s25hl02gt and s25hs02gt

  Raw NAND core changes:
   - Convert to platform remove callback returning void
   - Fix spelling mistake waifunc() -> waitfunc()

  Raw NAND controller driver changes:
   - imx: Remove unused is_imx51_nfc and imx53_nfc functions
   - omap2: Drop obsolete dependency on COMPILE_TEST
   - orion: Use devm_platform_ioremap_resource()
   - qcom:
      - Use of_property_present() for testing DT property presence
      - Use devm_platform_get_and_ioremap_resource()
   - stm32_fmc2: Depends on ARCH_STM32 instead of MACH_STM32MP157
   - tmio: Remove reference to config MTD_NAND_TMIO in the parsers

  Raw NAND manufacturer driver changes:
   - hynix: Fix up bit 0 of sdr_timing_mode

  SPI-NAND changes:
   - Add support for ESMT F50x1G41LB"

* tag 'mtd/for-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (55 commits)
  mtd: nand: Convert to platform remove callback returning void
  mtd: onenand: omap2: Drop obsolete dependency on COMPILE_TEST
  mtd: spi-nor: spansion: Add support for s25hl02gt and s25hs02gt
  mtd: spi-nor: spansion: Add a new ->ready() hook for multi-chip device
  mtd: spi-nor: spansion: Rework cypress_nor_quad_enable_volatile() for multi-chip device support
  mtd: spi-nor: spansion: Rework cypress_nor_get_page_size() for multi-chip device support
  mtd: spi-nor: sfdp: Add support for SCCR map for multi-chip device
  mtd: spi-nor: Extract volatile register offset from SCCR map
  mtd: spi-nor: Allow post_sfdp hook to return errors
  mtd: spi-nor: spansion: Rename method to cypress_nor_get_page_size
  mtd: spi-nor: spansion: Enable JFFS2 write buffer for S25FS256T
  mtd: spi-nor: spansion: Enable JFFS2 write buffer for Infineon s25hx SEMPER flash
  mtd: spi-nor: spansion: Enable JFFS2 write buffer for Infineon s28hx SEMPER flash
  mtd: spi-nor: spansion: Determine current address mode
  mtd: spi-nor: core: Introduce spi_nor_set_4byte_addr_mode()
  mtd: spi-nor: core: Update flash's current address mode when changing address mode
  mtd: spi-nor: Stop exporting spi_nor_restore()
  mtd: spi-nor: Set the 4-Byte Address Mode method based on SFDP data
  mtd: spi-nor: core: Make spi_nor_set_4byte_addr_mode_brwr public
  mtd: spi-nor: core: Update name and description of spi_nor_set_4byte_addr_mode
  ...

1 files changed, 27 insertions, 0 deletions

diff --git a/drivers/mtd/spi-nor/sfdp.h b/drivers/mtd/spi-nor/sfdp.h
index 500659b35655..6eb99e1cdd61 100644
--- a/drivers/mtd/spi-nor/sfdp.h
+++ b/drivers/mtd/spi-nor/sfdp.h
@@ -15,6 +15,7 @@
 
 /* SFDP DWORDS are indexed from 1 but C arrays are indexed from 0. */
 #define SFDP_DWORD(i)		((i) - 1)
+#define SFDP_MASK_CHECK(dword, mask)		(((dword) & (mask)) == (mask))
 
 /* Basic Flash Parameter Table */
 
@@ -89,6 +90,32 @@ struct sfdp_bfpt {
 #define BFPT_DWORD15_QER_SR2_BIT1_NO_RD		(0x4UL << 20)
 #define BFPT_DWORD15_QER_SR2_BIT1		(0x5UL << 20) /* Spansion */
 
+#define BFPT_DWORD16_EN4B_MASK			GENMASK(31, 24)
+#define BFPT_DWORD16_EN4B_ALWAYS_4B		BIT(30)
+#define BFPT_DWORD16_EN4B_4B_OPCODES		BIT(29)
+#define BFPT_DWORD16_EN4B_16BIT_NV_CR		BIT(28)
+#define BFPT_DWORD16_EN4B_BRWR			BIT(27)
+#define BFPT_DWORD16_EN4B_WREAR			BIT(26)
+#define BFPT_DWORD16_EN4B_WREN_EN4B		BIT(25)
+#define BFPT_DWORD16_EN4B_EN4B			BIT(24)
+#define BFPT_DWORD16_EX4B_MASK			GENMASK(18, 14)
+#define BFPT_DWORD16_EX4B_16BIT_NV_CR		BIT(18)
+#define BFPT_DWORD16_EX4B_BRWR			BIT(17)
+#define BFPT_DWORD16_EX4B_WREAR			BIT(16)
+#define BFPT_DWORD16_EX4B_WREN_EX4B		BIT(15)
+#define BFPT_DWORD16_EX4B_EX4B			BIT(14)
+#define BFPT_DWORD16_4B_ADDR_MODE_MASK			\
+	(BFPT_DWORD16_EN4B_MASK | BFPT_DWORD16_EX4B_MASK)
+#define BFPT_DWORD16_4B_ADDR_MODE_16BIT_NV_CR		\
+	(BFPT_DWORD16_EN4B_16BIT_NV_CR | BFPT_DWORD16_EX4B_16BIT_NV_CR)
+#define BFPT_DWORD16_4B_ADDR_MODE_BRWR			\
+	(BFPT_DWORD16_EN4B_BRWR | BFPT_DWORD16_EX4B_BRWR)
+#define BFPT_DWORD16_4B_ADDR_MODE_WREAR			\
+	(BFPT_DWORD16_EN4B_WREAR | BFPT_DWORD16_EX4B_WREAR)
+#define BFPT_DWORD16_4B_ADDR_MODE_WREN_EN4B_EX4B	\
+	(BFPT_DWORD16_EN4B_WREN_EN4B | BFPT_DWORD16_EX4B_WREN_EX4B)
+#define BFPT_DWORD16_4B_ADDR_MODE_EN4B_EX4B		\
+	(BFPT_DWORD16_EN4B_EN4B | BFPT_DWORD16_EX4B_EX4B)
 #define BFPT_DWORD16_SWRST_EN_RST		BIT(12)
 
 #define BFPT_DWORD18_CMD_EXT_MASK		GENMASK(30, 29)