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| author | Li Zetao <lizetao1@huawei.com> | 2023-08-21 11:17:30 +0800 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2023-08-21 09:39:25 +0200 |
| commit | 7714579d041feef8675d9decf7d0764aaf2fab05 (patch) | |
| tree | 9a3f3ce355fbfc91f534b38284da08736d1cbcbd /drivers/mtd | |
| parent | 03f2cde57d86b20dc0f3ddc10f394c00ab77ee02 (diff) | |
| download | linux-stable-7714579d041feef8675d9decf7d0764aaf2fab05.tar.gz linux-stable-7714579d041feef8675d9decf7d0764aaf2fab05.tar.bz2 linux-stable-7714579d041feef8675d9decf7d0764aaf2fab05.zip | |
mtd: rawnand: lpc32xx_slc: Use helper function devm_clk_get_enabled()
Since commit 7ef9651e9792 ("clk: Provide new devm_clk helpers for prepared
and enabled clocks"), devm_clk_get() and clk_prepare_enable() can now be
replaced by devm_clk_get_enabled() when driver enables (and possibly
prepares) the clocks for the whole lifetime of the device. Moreover, it is
no longer necessary to unprepare and disable the clocks explicitly, so drop
the label "unprepare_clk".
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Li Zetao <lizetao1@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20230821031737.1973183-6-lizetao1@huawei.com
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/nand/raw/lpc32xx_slc.c | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/drivers/mtd/nand/raw/lpc32xx_slc.c b/drivers/mtd/nand/raw/lpc32xx_slc.c index 2201264d3c37..1c5fa855b9f2 100644 --- a/drivers/mtd/nand/raw/lpc32xx_slc.c +++ b/drivers/mtd/nand/raw/lpc32xx_slc.c @@ -871,15 +871,12 @@ static int lpc32xx_nand_probe(struct platform_device *pdev) mtd->dev.parent = &pdev->dev; /* Get NAND clock */ - host->clk = devm_clk_get(&pdev->dev, NULL); + host->clk = devm_clk_get_enabled(&pdev->dev, NULL); if (IS_ERR(host->clk)) { dev_err(&pdev->dev, "Clock failure\n"); res = -ENOENT; goto enable_wp; } - res = clk_prepare_enable(host->clk); - if (res) - goto enable_wp; /* Set NAND IO addresses and command/ready functions */ chip->legacy.IO_ADDR_R = SLC_DATA(host->io_base); @@ -907,13 +904,13 @@ static int lpc32xx_nand_probe(struct platform_device *pdev) GFP_KERNEL); if (host->data_buf == NULL) { res = -ENOMEM; - goto unprepare_clk; + goto enable_wp; } res = lpc32xx_nand_dma_setup(host); if (res) { res = -EIO; - goto unprepare_clk; + goto enable_wp; } /* Find NAND device */ @@ -934,8 +931,6 @@ cleanup_nand: nand_cleanup(chip); release_dma: dma_release_channel(host->dma_chan); -unprepare_clk: - clk_disable_unprepare(host->clk); enable_wp: lpc32xx_wp_enable(host); @@ -962,7 +957,6 @@ static void lpc32xx_nand_remove(struct platform_device *pdev) tmp &= ~SLCCFG_CE_LOW; writel(tmp, SLC_CTRL(host->io_base)); - clk_disable_unprepare(host->clk); lpc32xx_wp_enable(host); } |