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| author | Takashi Iwai <tiwai@suse.de> | 2023-06-26 15:38:02 +0200 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2023-06-26 15:38:02 +0200 |
| commit | d6048fdc870240e5020343f8af0c825829c232bd (patch) | |
| tree | d83ca76eaac5f8bf1c4c16f003aad64baa8fae62 /drivers/net/ethernet/intel/igb/e1000_mac.c | |
| parent | a15b51375684c2bfa6017bb185139477e7a3b96c (diff) | |
| parent | 2d0cad0473bd1ffbc5842be0b9f2546265acb011 (diff) | |
| download | linux-stable-d6048fdc870240e5020343f8af0c825829c232bd.tar.gz linux-stable-d6048fdc870240e5020343f8af0c825829c232bd.tar.bz2 linux-stable-d6048fdc870240e5020343f8af0c825829c232bd.zip | |
Merge tag 'asoc-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v6.5
A fairly quiet release from a core and framework point of view, but a
very big one from the point of view of new drivers:
- More refectoring from Morimoto-san, this time mainly around DAI
links and how we control the ordering of trigger() callbacks.
- Convert a lot of drivers to use maple tree based caches.
- Lots of work on the x86 driver stack.
- Compressed audio support for Qualcomm.
- Support for AMD SoundWire, Analog Devices SSM3515, Google Chameleon,
Ingenic X1000, Intel systems with various CODECs, Longsoon platforms,
Maxim MAX98388, Mediatek MT8188, Nuvoton NAU8825C, NXP platforms with
NAU8822, Qualcomm WSA884x, StarFive JH7110, Texas Instruments TAS2781.
Diffstat (limited to 'drivers/net/ethernet/intel/igb/e1000_mac.c')
| -rw-r--r-- | drivers/net/ethernet/intel/igb/e1000_mac.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/intel/igb/e1000_mac.c b/drivers/net/ethernet/intel/igb/e1000_mac.c index 205d577bdbba..caf91c6f52b4 100644 --- a/drivers/net/ethernet/intel/igb/e1000_mac.c +++ b/drivers/net/ethernet/intel/igb/e1000_mac.c @@ -426,7 +426,7 @@ void igb_mta_set(struct e1000_hw *hw, u32 hash_value) static u32 igb_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr) { u32 hash_value, hash_mask; - u8 bit_shift = 0; + u8 bit_shift = 1; /* Register count multiplied by bits per register */ hash_mask = (hw->mac.mta_reg_count * 32) - 1; @@ -434,7 +434,7 @@ static u32 igb_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr) /* For a mc_filter_type of 0, bit_shift is the number of left-shifts * where 0xFF would still fall within the hash mask. */ - while (hash_mask >> bit_shift != 0xFF) + while (hash_mask >> bit_shift != 0xFF && bit_shift < 4) bit_shift++; /* The portion of the address that is used for the hash table |