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authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2022-05-18 15:55:07 +0100
committerJakub Kicinski <kuba@kernel.org>2022-05-19 18:14:30 -0700
commit650a49bc65df6b0e0051a8f62d7c22d95a8f350d (patch)
treec203cf30d2c640b16ec22805b01e77a4d89039c4 /drivers/net/ethernet/mediatek/mtk_eth_soc.c
parent1ec619ee4a052fb9ac48b57554ac2722a0bfe73c (diff)
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net: mtk_eth_soc: add fixme comment for state->speed use
Add a fixme comment for the last remaining incorrect usage of state->speed in the mac_config() method, which is strangely in a code path which is only run when the PHY interface mode changes. This means if we are in RGMII mode, changes in state->speed will not cause the INTF_MODE, TRGMII_RCK_CTRL and TRGMII_TCK_CTRL registers to be set according to the speed, nor will the TRGPLL clock be set to the correct value. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net/ethernet/mediatek/mtk_eth_soc.c')
-rw-r--r--drivers/net/ethernet/mediatek/mtk_eth_soc.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 87b5a837695f..211457a8831d 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -327,6 +327,14 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode,
state->interface))
goto err_phy;
} else {
+ /* FIXME: this is incorrect. Not only does it
+ * use state->speed (which is not guaranteed
+ * to be correct) but it also makes use of it
+ * in a code path that will only be reachable
+ * when the PHY interface mode changes, not
+ * when the speed changes. Consequently, RGMII
+ * is probably broken.
+ */
mtk_gmac0_rgmii_adjust(mac->hw,
state->interface,
state->speed);