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author | Paul Blakey <paulb@nvidia.com> | 2023-01-25 12:03:58 +0200 |
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committer | Saeed Mahameed <saeedm@nvidia.com> | 2023-04-05 18:57:33 -0700 |
commit | 35c8de16d84632dd73ac17f619f3cb824803c89e (patch) | |
tree | f3b0b6180ede44506fa9015fa92e84ac191cbd17 /drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec_fs.c | |
parent | dc614025e22810eab057fe683cd0042abde3930c (diff) | |
download | linux-stable-35c8de16d84632dd73ac17f619f3cb824803c89e.tar.gz linux-stable-35c8de16d84632dd73ac17f619f3cb824803c89e.tar.bz2 linux-stable-35c8de16d84632dd73ac17f619f3cb824803c89e.zip |
net/mlx5e: TC, Remove sample and ct limitation
Sample action before a ct nat action was not supported when only
chain was restored on misses. As to work around that limitation,
ct action was reordered to be first (so if hw misses on ct
action, packet wasn't modified). This reordering wasn't possible
if there was a sample action before the ct nat action, as we had to
sample the packet before the nat operation.
Now that the misses continue from the relevant tc ct action
in software and ct action is no longer reordered, this case
is supported.
Remove this limitation.
Signed-off-by: Paul Blakey <paulb@nvidia.com>
Reviewed-by: Roi Dayan <roid@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec_fs.c')
0 files changed, 0 insertions, 0 deletions