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authorRobert Marko <robimarko@gmail.com>2024-02-11 19:16:41 +0100
committerPaolo Abeni <pabeni@redhat.com>2024-02-13 15:46:42 +0100
commitbed90b06b6812d9c8c848414b090ddf38f0e6cc1 (patch)
tree46ff373ff8111f95f4e1ecc95ef377a6bbea3d23 /drivers/net/phy/aquantia
parent32c7eec21c11e149a9195cf0d48cc530d1e5a637 (diff)
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net: phy: aquantia: clear PMD Global Transmit Disable bit during init
PMD Global Transmit Disable bit should be cleared for normal operation. This should be HW default, however I found that on Asus RT-AX89X that uses AQR113C PHY and firmware 5.4 this bit is set by default. With this bit set the AQR cannot achieve a link with its link-partner and it took me multiple hours of digging through the vendor GPL source to find this out, so lets always clear this bit during .config_init() to avoid a situation like this in the future. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20240211181732.646311-1-robimarko@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'drivers/net/phy/aquantia')
-rw-r--r--drivers/net/phy/aquantia/aquantia_main.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c
index 97a2fafa15ca..e1f092cbfdce 100644
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
@@ -727,6 +727,15 @@ static int aqr113c_config_init(struct phy_device *phydev)
if (ret < 0)
return ret;
+ ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS,
+ MDIO_PMD_TXDIS_GLOBAL);
+ if (ret)
+ return ret;
+
+ ret = aqr107_wait_processor_intensive_op(phydev);
+ if (ret)
+ return ret;
+
return aqr107_fill_interface_modes(phydev);
}