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| author | Imre Deak <imre.deak@intel.com> | 2019-05-09 20:34:44 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2019-05-14 14:06:30 +0300 |
| commit | 08d8e17005a34f773f55005a153edc28fc5ab5e3 (patch) | |
| tree | 7c5ebabc61185e30c0ba509abbbd070f6b4b0171 /drivers/opp | |
| parent | 6f08ebe779a3e5bec8ee3a14b9c15329a59221b1 (diff) | |
| download | linux-stable-08d8e17005a34f773f55005a153edc28fc5ab5e3.tar.gz linux-stable-08d8e17005a34f773f55005a153edc28fc5ab5e3.tar.bz2 linux-stable-08d8e17005a34f773f55005a153edc28fc5ab5e3.zip | |
drm/i915: Replace use of PLLS power domain with DISPLAY_CORE domain
There isn't a separate power domain specific to PLLs. When programming
them we require the same power domain to be enabled which is needed when
accessing other display core parts (not specific to any
pipe/port/transcoder). This corresponds to the DISPLAY_CORE domain added
previously in this patchset, so use that instead to save bits in the
power domain mask.
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190509173446.31095-10-imre.deak@intel.com
Diffstat (limited to 'drivers/opp')
0 files changed, 0 insertions, 0 deletions