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author | Kishon Vijay Abraham I <kishon@ti.com> | 2020-05-08 18:36:45 +0530 |
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committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2020-05-18 15:52:34 +0100 |
commit | 7fb39bf2a1de9dc9e0846a1e3fe74e959a693a0d (patch) | |
tree | 09141e50dd6d158d7987954d76fccf5bd3546c42 /drivers/pci/controller/cadence/pcie-cadence.h | |
parent | 9e2618c3f1a9499a921131a913b25d1347f16261 (diff) | |
download | linux-stable-7fb39bf2a1de9dc9e0846a1e3fe74e959a693a0d.tar.gz linux-stable-7fb39bf2a1de9dc9e0846a1e3fe74e959a693a0d.tar.bz2 linux-stable-7fb39bf2a1de9dc9e0846a1e3fe74e959a693a0d.zip |
PCI: cadence: Fix to read 32-bit Vendor ID/Device ID property from DT
The PCI Bus Binding specification (IEEE Std 1275-1994 Revision 2.1 [1])
defines both Vendor ID and Device ID to be 32-bits. Fix
pcie-cadence-host.c driver to read 32-bit Vendor ID and Device ID
properties from device tree.
[1] -> https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf
Link: https://lore.kernel.org/r/20200508130646.23939-4-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Tom Joseph <tjoseph@cadence.com>
Diffstat (limited to 'drivers/pci/controller/cadence/pcie-cadence.h')
-rw-r--r-- | drivers/pci/controller/cadence/pcie-cadence.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h index 6bd89a21bb1c..df14ad002fe9 100644 --- a/drivers/pci/controller/cadence/pcie-cadence.h +++ b/drivers/pci/controller/cadence/pcie-cadence.h @@ -262,8 +262,8 @@ struct cdns_pcie_rc { struct resource *bus_range; void __iomem *cfg_base; u32 no_bar_nbits; - u16 vendor_id; - u16 device_id; + u32 vendor_id; + u32 device_id; }; /** |