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author | Bjorn Helgaas <bhelgaas@google.com> | 2018-04-04 13:28:47 -0500 |
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committer | Bjorn Helgaas <helgaas@kernel.org> | 2018-04-04 13:28:47 -0500 |
commit | 14d8d776aeda8e367a9354b6cb6a0696671630c9 (patch) | |
tree | f52cce50460b33af1fc870c69057414e4d02159a /drivers/pci/endpoint/pci-epc-core.c | |
parent | 1ad9a8730e8fd15c6f2ed2230e38a61c3a61d438 (diff) | |
parent | 16b17cad0990f13cdcdfd9694cc7c41c7c76b0cf (diff) | |
download | linux-stable-14d8d776aeda8e367a9354b6cb6a0696671630c9.tar.gz linux-stable-14d8d776aeda8e367a9354b6cb6a0696671630c9.tar.bz2 linux-stable-14d8d776aeda8e367a9354b6cb6a0696671630c9.zip |
Merge branch 'lorenzo/pci/endpoint'
* lorenzo/pci/endpoint:
misc: pci_endpoint_test: Handle 64-bit BARs properly
PCI: designware-ep: Make dw_pcie_ep_reset_bar() handle 64-bit BARs properly
PCI: endpoint: Make sure that BAR_5 does not have 64-bit flag set when clearing
PCI: endpoint: Make epc->ops->clear_bar()/pci_epc_clear_bar() take struct *epf_bar
PCI: endpoint: Handle 64-bit BARs properly
PCI: cadence: Set PCI_BASE_ADDRESS_MEM_TYPE_64 if a 64-bit BAR was set-up
PCI: designware-ep: Make dw_pcie_ep_set_bar() handle 64-bit BARs properly
PCI: endpoint: Setting a BAR size > 4 GB is invalid if 64-bit flag is not set
PCI: endpoint: Setting 64-bit/prefetch bit is invalid when IO is set
PCI: endpoint: Setting BAR_5 to 64-bits wide is invalid
PCI: endpoint: Simplify epc->ops->set_bar()/pci_epc_set_bar()
PCI: endpoint: BAR width should not depend on sizeof dma_addr_t
PCI: endpoint: Remove goto labels in pci_epf_create()
PCI: endpoint: Fix kernel panic after put_device()
PCI: endpoint: Simplify name allocation for EPF device
Diffstat (limited to 'drivers/pci/endpoint/pci-epc-core.c')
-rw-r--r-- | drivers/pci/endpoint/pci-epc-core.c | 32 |
1 files changed, 20 insertions, 12 deletions
diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index e245bba0ab53..b0ee42739c3c 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -276,22 +276,25 @@ EXPORT_SYMBOL_GPL(pci_epc_map_addr); * pci_epc_clear_bar() - reset the BAR * @epc: the EPC device for which the BAR has to be cleared * @func_no: the endpoint function number in the EPC device - * @bar: the BAR number that has to be reset + * @epf_bar: the struct epf_bar that contains the BAR information * * Invoke to reset the BAR of the endpoint device. */ -void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, int bar) +void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, + struct pci_epf_bar *epf_bar) { unsigned long flags; - if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) + if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions || + (epf_bar->barno == BAR_5 && + epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)) return; if (!epc->ops->clear_bar) return; spin_lock_irqsave(&epc->lock, flags); - epc->ops->clear_bar(epc, func_no, bar); + epc->ops->clear_bar(epc, func_no, epf_bar); spin_unlock_irqrestore(&epc->lock, flags); } EXPORT_SYMBOL_GPL(pci_epc_clear_bar); @@ -300,26 +303,31 @@ EXPORT_SYMBOL_GPL(pci_epc_clear_bar); * pci_epc_set_bar() - configure BAR in order for host to assign PCI addr space * @epc: the EPC device on which BAR has to be configured * @func_no: the endpoint function number in the EPC device - * @bar: the BAR number that has to be configured - * @size: the size of the addr space - * @flags: specify memory allocation/io allocation/32bit address/64 bit address + * @epf_bar: the struct epf_bar that contains the BAR information * * Invoke to configure the BAR of the endpoint device. */ -int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, enum pci_barno bar, - dma_addr_t bar_phys, size_t size, int flags) +int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, + struct pci_epf_bar *epf_bar) { int ret; unsigned long irq_flags; - - if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) + int flags = epf_bar->flags; + + if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions || + (epf_bar->barno == BAR_5 && + flags & PCI_BASE_ADDRESS_MEM_TYPE_64) || + (flags & PCI_BASE_ADDRESS_SPACE_IO && + flags & PCI_BASE_ADDRESS_IO_MASK) || + (upper_32_bits(epf_bar->size) && + !(flags & PCI_BASE_ADDRESS_MEM_TYPE_64))) return -EINVAL; if (!epc->ops->set_bar) return 0; spin_lock_irqsave(&epc->lock, irq_flags); - ret = epc->ops->set_bar(epc, func_no, bar, bar_phys, size, flags); + ret = epc->ops->set_bar(epc, func_no, epf_bar); spin_unlock_irqrestore(&epc->lock, irq_flags); return ret; |