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author | Johan Hovold <johan+linaro@kernel.org> | 2022-04-01 15:33:51 +0200 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2022-05-24 16:39:51 -0500 |
commit | fdf6a2f533115ec5d4d9629178f8196331f1ac50 (patch) | |
tree | 2032ac2d735ad13348fb1ee08fc705774f80d53c /drivers/pci | |
parent | a935601eed18d739c11da5504b551c7c4754f2ec (diff) | |
download | linux-stable-fdf6a2f533115ec5d4d9629178f8196331f1ac50.tar.gz linux-stable-fdf6a2f533115ec5d4d9629178f8196331f1ac50.tar.bz2 linux-stable-fdf6a2f533115ec5d4d9629178f8196331f1ac50.zip |
PCI: qcom: Fix pipe clock imbalance
Fix a clock imbalance introduced by ed8cc3b1fc84 ("PCI: qcom: Add support
for SDM845 PCIe controller"), which enables the pipe clock both in init()
and in post_init() but only disables in post_deinit().
Note that the pipe clock was also never disabled in the init() error
paths and that enabling the clock before powering up the PHY looks
questionable.
Link: https://lore.kernel.org/r/20220401133351.10113-1-johan+linaro@kernel.org
Fixes: ed8cc3b1fc84 ("PCI: qcom: Add support for SDM845 PCIe controller")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: stable@vger.kernel.org # 5.6
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/controller/dwc/pcie-qcom.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 375f27ab9403..925324dece64 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1238,12 +1238,6 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie) goto err_disable_clocks; } - ret = clk_prepare_enable(res->pipe_clk); - if (ret) { - dev_err(dev, "cannot prepare/enable pipe clock\n"); - goto err_disable_clocks; - } - /* Wait for reset to complete, required on SM8450 */ usleep_range(1000, 1500); |