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| author | Johan Hovold <johan+linaro@kernel.org> | 2022-10-17 08:50:13 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2022-10-17 13:45:47 +0530 |
| commit | 2d93887cb4bac0a36ce9e146956f631ab7994680 (patch) | |
| tree | 28ff718b3f3fe18dd02933492bcd598dcaac5bee /drivers/phy | |
| parent | 5b76f5ec63e0bfd20d955fc9d09dc2cff7742bec (diff) | |
| download | linux-stable-2d93887cb4bac0a36ce9e146956f631ab7994680.tar.gz linux-stable-2d93887cb4bac0a36ce9e146956f631ab7994680.tar.bz2 linux-stable-2d93887cb4bac0a36ce9e146956f631ab7994680.zip | |
phy: qcom-qmp-pcie: drop bogus register update
Since commit 0d58280cf1e6 ("phy: Update PHY power control sequence") the
PHY is powered on before configuring the registers and only the MSM8996
PCIe PHY, which includes the POWER_DOWN_CONTROL register in its PCS
initialisation table, may possibly require a second update afterwards.
To make things worse, the POWER_DOWN_CONTROL register lies at a
different offset on more recent SoCs so that the second update, which
still used a hard-coded offset, would write to an unrelated register
(e.g. a revision-id register on SC8280XP).
As the MSM8996 PCIe PHY is now handled by a separate driver, simply drop
the bogus register update.
Fixes: e4d8b05ad5f9 ("phy: qcom-qmp: Use proper PWRDOWN offset for sm8150 USB") added support
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #RB3
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221017065013.19647-12-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy')
| -rw-r--r-- | drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index cb2128e5a78d..30838ae8f027 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -2061,12 +2061,6 @@ static int qmp_pcie_power_on(struct phy *phy) qmp_pcie_pcs_init(qphy, &cfg->tables); qmp_pcie_pcs_init(qphy, mode_tables); - /* - * Pull out PHY from POWER DOWN state. - * This is active low enable signal to power-down PHY. - */ - qphy_setbits(pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl); - if (cfg->has_pwrdn_delay) usleep_range(cfg->pwrdn_delay_min, cfg->pwrdn_delay_max); |